Physical Design Verification Manager, Annapurna Labs
Core
Lead end-to-end physical verification strategy for AWS's most complex SoCs (≥100M gates) from floorplan to tape-out.
Role type
Senior IC Physical Design Verification Manager
Builds
Custom SoCs for AWS Machine Learning servers (Inferentia, Trainium)
Domain
Semiconductor / Hardware Design / Cloud Infrastructure
Deliverable
production ML models
Required skills
Physical verification strategy, team leadership (3-5 engineers), Calibre, IC Validator, PVS, Python/Perl scripting, DFM, reliability verification (IR drop, EM)
Preferred skills
Advanced-node expertise (5nm, 4nm, N4P), DFM & Reliability analysis, technical publications
Technologies
Calibre, IC Validator, PVS, Python, Perl, Tcl
Responsibilities
Define verification closure roadmap and risk-mitigation plans, standardize verification methodologies, drive automation of runsets and debug flows, mentor junior engineers on advanced-node debug techniques, pilot next-gen verification technologies
Seniority
Senior, hands-on IC with management responsibilities