ASIC Verification Engineering
929 open positions
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ASIC Verification Engineer HpeBengaluru, Karnātaka, India 1d Design, analyze, develop, and evaluate VLSI components and hardware systems, focusing on architecture, logic design, and design verification through software simulation.
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Sr Engineer Design GlobalFoundriesEgypt 1d Design and verify custom System-on-Chip (SoC) designs, focusing on Design-for-Test (DFT) architectures and test solutions.
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Mixed- Signal Systems and Verification Engineer CadenceBANGALORE, IN 1d Developing and verifying real-numbered behavioral models for analog/RF blocks in SystemVerilog to ensure accurate representation of analog schematics and integration with RTL.
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Senior Digital Verification Engineer Bosch-GroupMilano, Lombardia, it $45k–$45k1d Design and develop scalable, reusable verification environments for complex Mixed-Signal and System-on-Chip (SoC) ASICs to ensure product quality and accelerate first silicon bring-up.
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Senior Staff Engineer Samsung ElectronicsSSIR, Angkor West, Bangalore, India 2d Design Verification Engineer responsible for independent ownership of IP Design Verification (DV), creating test plans, building testbenches, and developing DV infrastructure.
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CPU Verification Engineer, Director↗ QualcommSanta Clara, CA, US $253k–$253k2d Lead innovative Central Processing Unit (CPU) design efforts and direct the development and verification of high performance and low power CPU designs.
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Sr Deep Learning Verification Engineer IntelIreland, Leixlip $77k–$120k2d Validate and optimize next-generation NPU silicon solutions and AI hardware components through pre-silicon functional verification.
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Design Verification Lead Texas InstrumentsBengaluru, Karnataka, India 2d Lead design verification for high-speed SerDes transceivers (Ethernet PHY, FPD-Link, USB) targeting Automotive ADAS and In-Vehicle-Infotainment applications.
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Senior Engineer Functional DV↗ Quest GlobalKA, IN 2d Developing comprehensive verification plans, testbenches, and executing functional tests to ensure design compliance and performance for components like CDP, GDP, USB4, PG, and PM.
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Senior FPGA Verification Engineer CienaOttawa, CA $104k–$104k2d Lead FPGA verification efforts for complex chip-level designs enabling advanced networking solutions.
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Design Verification Intern MarvellPetah-Tikva, IL 2d Verify complex semiconductor solutions for next-generation cloud data center switching silicon using industry-standard verification tools and methodologies.
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FPGA Development Tools Engineer AlteraPenang 15, Penang, Malaysia 3d Senior Technical Lead driving development, modeling, and validation of FPGA IP and simulation models within the Altera Quartus Prime ecosystem.
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Principal Verification Engineer ON SemiconductorBangalore, Karnataka, India 3d Ensure functional correctness, robustness, and quality of cutting-edge semiconductor and SoC designs through comprehensive verification planning, testbench development, and advanced simulation techniques.
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Software Engineer II: Hardware Verification R&D↗ Cadence Design SystemsBelo Horizonte, MG, BR 3d Develop a compiler for the STIL language to generate hardware testbenches and work on functional safety solutions for emulation environments.
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VLSI ENGINEER L4↗ WiproGuadalajara, JAL, MX 3d Develop VLSI systems by defining functionalities, architecture, layout, and implementation for clients.
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Stage Ingénieur : Génération de VIP et d’assertions pour IP mixtes par agents IA (F/H) NxpToulouse, FR 3d Develop an AI agent to automate the generation of reusable verification components (VIPs, checkers, assertions) for digitally controlled mixed-signal IPs, specifically DC/DC converters.
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Electrical Engineer Renesas-ElectronicsAustin, TEXAS, us 3d Develop, debug, and verify digital designs for advanced digital power ICs in pre and post silicon environments.
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Principal DFT Engineer MicrosoftUnited States, Washington, Redmond 3d Lead DFT strategy and execution across multiple projects, defining architecture (scan, MBIST, JTAG) and managing ATPG to ensure high fault coverage and test efficiency.
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Design Verification Intern↗ Quadric Pty LtdBurlingame, CA, US $104k–$119k4d Intern supporting the design verification of a next-generation General Purpose Neural Processing Unit (GPNPU) for edge AI devices.
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Sr/ IC Design Engineer (Design Verification)↗ Ethos Search Associates Pte LtdSingapore, S00, SG 4d Develop and review test plans, create constrained-random verification environments, and debug tests for complex DUTs to ensure pre-silicon IP/IC/SOCs meet performance specifications.
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Senior Cell Modeling and Verification Engineer NVIDIAUS, CA, Santa Clara $136k–$136k4d Develop behavioral models and verification for custom mixed-signal design cells used across NVIDIA products.
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Senior Staff Emulation Engineer↗ Maxlinear Inc.Kallang, S00, SG 4d Create emulation/FPGA models from RTL designs to enable preSilicon and postSilicon functional validation and software development for complex SoC designs.
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Emulation Technical Leader CiscoSan Jose, California, US $214k–$214k4d Architecting pre-silicon emulation roadmap and defining DFT emulation strategy for Silicon One's complex ASICs.
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Principal Engineer, Design Verification Engineering AnalogdevicesIndia, Bangalore, RMZ 4d Lead end-to-end design verification for complex digital SoCs, microprocessor-based designs, AI/ML accelerators, and high-speed peripherals, driving execution from planning to signoff.
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IC Verification Engineer BroadcomIND-Bangalore Electronic City - S1, IN 4d Design and execute verification strategies for Block/Core/SoC to ensure functional coverage and debug regression failures.
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