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Senior Quantum Design Verification Engineer

United States, Washington, Redmond💼 Full-time🗓 2026-06-05 → 2026-07-31

Core

Define pre-silicon simulation and post-silicon validation plans for SoC and IP, creating verification environments and tests for RTL/netlist designs while managing repositories and bug tracking.

Role type

Senior IC design verification engineer (SoC/IP)

Builds

High-quality SoC and IP designs ready for silicon

Domain

Semiconductor hardware design and verification

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Verification principles, testbench creation, stimulus generation, simulation environment development, debugging complex designs, chip/computer architecture knowledge, analog/digital interface verification, scripting (Python/Ruby/Perl), C/C++ programming, analog mixed-signal modeling, silicon characterization, automation of simulation/data analysis

Preferred skills

AI-assisted verification flows, performance modeling, research gathering, task automation using modern AI tools

Technologies

Python, Ruby, Perl, C, C++, MATLAB, Visual Studio Code

Responsibilities

Create testplans for pre-silicon simulation including digital and analog components; collaborate with DFT teams to test DFT features; align verification methodologies with wider teams; drive continuous improvement to verification processes; manage databases and flows for SoC/IP repositories; setup and manage bug-tracking systems; drive milestone reviews and status reports; validate designs in simulation with pre and post layout RTL/netlists; perform analog mixed-signal simulation models; collaborate with architects, analog mixed-signal designers, physical design, and DFT teams

Seniority

Senior, hands-on IC

Rewrite
## About the role Your responsibilities will include: - Defining pre-silicon Simulation, post-silicon Validation/Characterization plans for SoC/ intellectual property (IP) - Coordinating and driving individuals, contingent staff and external vendors towards creating a high-quality design - Own and create verification environments and tests for IP level and SoC level designs - Validate designs in simulation with both pre and post layout Register Transfer Level (RTL) / netlists - Setup Databases, flows for SoC/IP repositories, manage them - Setup Bug-Tracking systems, log/track/manage/close bugs/issues - Drive Milestone reviews, reports/status - Create testplans for pre-silicon simulation verification, including for both digital and analog components - Performing Analog Mixed Signal Simulation models - Collaborate with Design for Test (DFT) team to test DFT features - Align verification methodologies with wider teams and drive continuous improvement to the Design Verification development processes for at scale execution - Collaborate effectively with architects, analog mixed-signal designers, verification engineers, physical design and DFT teams and other front-end designers - Other Embody our culture and values ## Requirements - Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position - OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment - OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment - OR equivalent experience - Degree (BSEE/MSEE/PhD) in Electrical Engineering or related field - 6+ years of experience in design verification with a proven track record of full verification cycle on complex SoC IPs and/or systems - In depth knowledge of verification principles, testbenches, stimulus generation - Substantial background in creating simulation environments, developing tests, and debugging designs - Solid understanding of chip and/or computer architecture - Solid understanding of Analog/Digital interface verification, including modeling of Analog components as required - Scripting language such as Python, Ruby, or Perl - Experience writing tests in C and C++ - Effective communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams - Artificial Intelligence (AI)-assisted solutions into verification flows and reporting to improve productivity and quality - Matlab Modeling - Familiarity with Analog Mixed-Signal modeling and simulations - Visual Studio Code - Silicon Characterization of Analog Mixed-Signal blocks and release to production - Automation of simulation and data analysis environments using scripting languages or tools such as MATLAB/Python - Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation) - Ability to work in an "AI-first" environment using modern AI tools to accelerate discovery through hardware development
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