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Low Power ASIC Engineer - New College Grad 2026

US, CA, Santa Clara💼 Full-time💰 $100,000–$166,750🗓 2026-06-02 → 2026-09-26

Core

Architecting and developing testbenches, infrastructure, and test plans to verify power management solutions for NVIDIA GPUs and SOC architectures.

Role type

Low Power ASIC Design/Verification Engineer (New Grad)

Builds

Energy-efficient GPU and SOC architectures for AI, Automotive, GeForce, and Mobile products

Domain

Semiconductor / GPU Architecture / Low Power Design

Deliverable

production ML models | product features

Required skills

Low power design techniques (multi VT, clock gating, power gating, DVFS), Verilog, SystemVerilog, UVM, processor architecture knowledge, debug skills, Incisive Low-Power or Synopsys VCS NLP experience

Preferred skills

Low Power Architecture/CV knowledge, UPF format understanding, Python/PERL scripting, C/C++ knowledge, Makefile/script maintenance

Technologies

Incisive Low-Power, Synopsys VCS NLP, Verdi, UPF, Python, PERL, C, C++

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