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Staff Design Verification Engineer

Hsinchu, Taiwan💼 Full-time🗓 2026-06-09 → 2026-09-25

Core

Ensuring fidelity of new highly configurable RISC-V CPU cores and related IPs for clients in autonomous driving, 5G, wearables, and IoT.

Role type

Staff Design Verification Engineer (CPU IP)

Builds

RISC-V based CPU IPs and related hardware components

Domain

Semiconductor / Chip Design / RISC-V Architecture

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

CPU cache hierarchy, cache coherency, memory consistency, high-level verification flow methodology, test plan creation, test generation, failure analysis, coverage analysis, closure, troubleshooting, analytical capabilities

Preferred skills

Functional programming

Technologies

RISC-V, CPU cache, verification flow

Responsibilities

Adopt state-of-the-art verification methodologies for in-house designs, create test plans and unit test benches, execute tests to ensure design intent, ensure verification quality through coverage metrics

Seniority

Staff, hands-on IC

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