Staff Verification Engineer
Core
Verifying functionality of High Speed IOs (PCIe, CXL) at the Sub-system level for next-generation SoCs.
Role type
Staff Verification Engineer (High Speed IO)
Builds
Next generation SoCs for premium mobile, infrastructure, IoT, and automotive markets
Domain
Semiconductor / High Speed Interface Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
PCIe/CXL subsystem verification, SystemVerilog/Verilog/UVM, digital hardware design, simulation and emulation platforms, formal methodology, test plan creation, debugging
Preferred skills
Arm-based designs, Clock domain crossing verification, Power aware verification, Perl/Python scripting
Technologies
SystemVerilog, Verilog, UVM, PCIe, CXL
Responsibilities
Build functional verification strategy, craft test plans, develop testbenches and tests, debug test failures, improve verification methodologies, guide junior members
Seniority
Staff, hands-on IC with mentorship