Associate Staff CAD Engineer - Physical Verification
Core
Develop and support physical verification rule decks (DRC, LVS, dummy fill, antenna, density, PERC, XOR) and automate verification flows for highly integrated SoCs.
Role type
Associate Staff IC physical verification engineer
Builds
Physical verification rule decks and automated verification flows for Silicon Labs SoCs
Domain
Semiconductor manufacturing / Physical Design Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Calibre SVRF, Calibre RVE, Calibre DRV, Virtuoso, Perl, Python, Shell scripting, DRC, LVS, dummy fill, antenna, density, PERC, XOR, impact analysis, vendor collaboration, code review, QA test case creation, flow development, mentorship
Preferred skills
LVS, extraction, AI-powered tools for productivity
Technologies
Calibre SVRF, Calibre RVE, Calibre DRV, Virtuoso, Perl, Python, Shell
Responsibilities
Develop physical verification rule decks like DRC, LVS, and dummy fill; Conduct impact analysis meetings for deck releases; Collaborate with design and layout teams to obtain specifications; Resolve PV related issues during the design development cycle; Create custom QA test cases to validate rule deck quality; Develop and maintain PV flows and methodologies; Perform tool/feature evaluations and benchmarks; Work with external vendors to track software bugs
Seniority
Associate Staff, hands-on IC with mentorship responsibilities
