ASIC Verification Engineering
1,763 open positions
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Staff Design Reliability Verification Engineer MicronBoise, Idaho, United States of America 27d Drive and develop reliability verification with design and product teams by planning, overseeing, and developing stress patterns for increased reliability coverage for DRAM products.
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ASIC Design Verification Engineer CiscoSan Jose, California, US $155k27d Architect and develop Design Verification (DV) infrastructure for complex ASICs, ensuring robust verification coverage and seamless integration for Cisco's data center hardware platforms.
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Design Verification Manager SemtechUSA - San Diego, CA $116k27d Lead a distributed verification team to develop and implement verification plans for mixed-signal integrated circuit blocks and systems.
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VLSI ENGINEER L1↗ WiproGuadalajara, JAL, MX 27d Develop VLSI systems by defining functionalities, architecture, layout, and implementation for clients, with a focus on verification and IP functionality.
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Video DV Engineer QualcommSan Diego, California, United States of America $130k–$194k27d Verify functionality of Computer Vision hardware IP and multimedia subsystems for integration into mobile SoCs.
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Senior Digital IC / Pre-Silicon Platform Engineer↗ IndieBuenos Aires, B, AR 27d Design, implement, and verify digital IP blocks and SoCs for automotive ADAS systems using FPGA prototyping.
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Senior Verification Engineer ArmBengaluru, India 27d System Verification engineer responsible for verifying next-generation compute solutions (SoC) using innovative methodologies and tools.
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Senior Principal Engineer, Emulation MarvellBangalore, IN 27d Define emulation strategy, develop test plans, and drive execution of emulation verification for large Custom Compute and Storage (CCS) products on platforms like Veloce, Zebu, and Palladium.
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Design Verification Lead Advanced Micro Devices, IncMARKHAM, Canada 28d Lead design verification for next-generation PCIe and CXL-based IP solutions, ensuring first-pass silicon success for FPGA and ASIC products.
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Hardware Verification Engineer - Microsoft Azure MicrosoftIsrael, Multiple Locations, Multiple Locations 28d Design verification environments, VIPs, and testbenches to verify hardware units and full devices for Microsoft Azure, ensuring cloud-grade quality.
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Senior Chip Design Verification Engineer NVIDIAIsrael, Yokneam 28d Verification engineer for high-speed communication chip blocks (PCIe Gen7) focusing on performance, throughput, and low latency.
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Staff Digital Verification Engineer ON SemiconductorBangalore, Karnataka, India 28d Lead verification efforts for IP, subsystem, and SoC-level projects, developing scalable environments and debugging complex RTL/gate-level issues.
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Digital Design Engineer, DFT AnalogdevicesPhilippines, Bonifacio Global City 28d Designing and implementing Digital Design for Test (DFT) architectures, scan patterns, and verification strategies for ASIC/SoC products.
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DFT Design Engineer AlteraJerusalem, Israel 28d Design and implementation of Design-for-Test (DFT) solutions for complex integrated circuits to ensure high test coverage and efficient manufacturing test.
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VLSI Design Verification Masters Level Intern HpeFt. Collins, Colorado, United States of America $83k–$96k28d Develop SystemVerilog and UVM testbench components, constrained-random tests, and functional coverage for HPE Slingshot interconnect ASIC verification.
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IC Verification Engineer BroadcomUSA-California-San Jose-1320 Ridder Park Drive $122k28d Develop test plans, functional coverage, and scalable test benches for Block/Core/SOC features to verify complex protocols.
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Senior / Staff Engineer - Digital Design InfineonSingapore 28d Generate DFT instruments, perform integration and verification, and conduct rule checking for digital design and testing.
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Design Verification Engineer Texas InstrumentsDallas, TX, United States 28d Drive, define, and utilize industry leading design verification methodologies, tools, and flows to ensure differentiated SoCs and IP meet functional and quality specifications.
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Senior DFT Engineer CommITKyiv, Ukraine 29d Own Design-for-Test on customer SoCs end-to-end, covering DFT architecture, scan/ATPG, memory BIST, boundary scan, pattern validation, and production test hand-off.
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Senior System Level Verification Engineer AxiadoSan Jose, CA, us 29d Lead design verification for complex ARM-based SoC hardware, focusing on chip-level verification, debugging, and ROM/Firmware bringup for network control and IoT systems.
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