ASIC Verification Engineering
1,763 open positions
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Senior System Level Verification Engineer AxiadoHyderabad, TS, in 29d Lead design verification for complex ARM-based SoC hardware, focusing on system-level test environments, debugging, and ROM/Firmware bringup for Smart Edge SoCs.
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2026 Graduate Trainee - Silicon Design Engineer (December Intake) Advanced Micro Devices, IncPenang, Malaysia 29d Verify new and existing features for High Speed IO Protocol IPs (USB, PCIe, Ethernet, UFS) and run design flows and simulations.
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PCIe Design Verification Intern - Spring 2027 NVIDIAUS, CA, Santa Clara 29d Verify PCIe and CXL hardware functionality and performance using SV/UVM test-benches.
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Senior Engineer -Performance Verification EricssonBangalore,Karnataka,India 29d Top-level performance verification of complex high-performance ASICs and multi-chip-modules, ensuring they meet standards for throughput, latency, bandwidth, and security.
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Staff Engineer IP Verification - Digital Design Verification MicronHyderabad, Telangana, India 29d Lead verification efforts for strategic IPs and complex subsystems in DDR5, LPDDR5, DDR6, and LPDDR6 memory technologies operating at high speeds up to 11,400 MT/s.
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IP Verification Lead Engineer, Sr QualcommBangalore, India 29d Lead engineer for IP level verification of hardware designs, developing testbenches and debugging using VCS.
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Technical Lead Verification NxpBangalore, IN 29d Define and implement digital verification strategy and plans for IP, sub-systems, or ICs to guarantee no functional faults exist according to specifications.
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Design Verification Engineer Digicomm SemiconductorBangalore, Karnataka 1mo Design Verification Engineer responsible for IP/SOC verification, testbench coding, and debugging design failures.
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Digital IC Design Engineer↗ Marvell TechnologyCordoba, Córdoba, Argentina 1mo Implement test architecture and logic for high-speed coherent transceivers targeting 800G+ connectivity applications.
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Hardware Verification Engineer 2 - Azure Core MicrosoftSerbia, Belgrade, Belgrade 1mo Own verification of custom blocks or subsystem integrations, achieving 100% coverage and building modern verification workflows.
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Senior Verification Engineer TechBiz Global GmbHMéxico 1mo Ensuring correctness and functionality of complex digital RISC-V CPU core designs at the Register Transfer Level using advanced verification methodologies.
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Senior DFT engineer↗ Avago Technologies International Sales Pte. LimitedYishun, S00, SG 1mo Design-for-Test (DFT) engineer responsible for implementing and verifying DFT solutions across complex hierarchical SoC/ASIC designs to ensure first-pass silicon success.
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Pre-Silicon Verification Engineer IntelUS, Oregon, Hillsboro $122k1mo Develop verification environments, tests, and debug pre-silicon issues for clock generator IPs (PLL/FLL) to ensure functional accuracy and reliability.
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Senior Engineer Digital Verification and Methodology InfineonLexington, KY 1mo Senior Engineer responsible for digital verification methodology, creating verification plans, and developing reusable verification environments for integrated circuits.
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Front-end RTL Design Engineer↗ Silicon InterfacesMH, IN ₹240k1mo VLSI Design Engineer specializing in SystemVerilog/UVM methodology, Portable Stimulus Standards (PSS) based Domain Specific Language (DSL), Fault Simulation, multi-core processor Verification, and Low Power Designs.
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Verification Intern - Solutions Engineering ArmSophia Antipolis, France €27k1mo Develop a reusable testbench framework to improve verification efficiency for SoC debug and trace features.
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SENIOR ENGINEER - HBM VERIFICATION↗ Micron TechnologyTlaquepaque, JAL, MX 1mo Lead verification activities and end-to-end analysis for complex full-chip custom builds of advanced low-power and power management technologies, specifically high-speed memories like HBM.
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Senior Verification Engineer↗ Timessquaretech Nyc IncRemote $218k1mo Define verification strategy and infrastructure for a high-throughput modem and DSP-intensive digital beamformer SoC, spanning IP, subsystem, and full-chip levels.
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Senior Digital Verification Engineer Bosch-GroupMilano, Lombardia, it €45k1mo Design and develop scalable, reusable verification environments for complex Digital and Mixed-Signal ASICs to ensure robust product quality and accelerate first silicon bring-up.
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Senior ASIC Verification Engineer HpeSunnyvale, California, United States of America $159k–$321k1mo Lead VLSI design verification for complex integrated circuits, developing test plans, functional models, and test benches to ensure full functionality of modules and chips.
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