DFT Intern - 2027
Core
Define DFT strategy through logic design, insertion, pre-silicon verification, pattern generation, and ATE bringup for NVIDIA chips.
Role type
DFT intern
Builds
Testing methodology for NVIDIA chips
Domain
Semiconductor / Digital Logic Design
Required skills
Logic design, Verification, Perl, Tcl, Verilog HDL
Preferred skills
Logic simulators (VCS, ncsim, Verdi), C/C++, Makefile
Technologies
VCS, ncsim, Verdi, Perl, Tcl, Verilog, C, C++, Makefile
Responsibilities
DFT logic implementation and verification, Maintain DFT flow and run regression, Run DFT verification, Pattern generation and bringup
Seniority
Intern
