CareerPlan

IC Verification Engineer

USA-California-San Jose-1320 Ridder Park DriveFull-time$122k2026-10-13 → 2026-11-10

Core

Develop test plans, functional coverage, and scalable test benches for Block/Core/SOC features to verify complex protocols.

Role type

Senior IC verification engineer (digital design)

Builds

Verification environments and testbenches for semiconductor blocks, cores, and system-on-chip (SoC) designs

Domain

Semiconductor / Digital IC Design

Required skills

System Verilog, UVM/VMM/OVM, Object-Oriented Programming, Functional Coverage, Test Plan Development, Regression Debugging, PCIe Protocol

Preferred skills

PCIe Protocol expertise

Technologies

System Verilog, UVM, VMM, OVM, PCIe

Responsibilities

Develop test plans for Block/Core/SOC features; Architect and develop scalable, re-usable test benches; Build pseudo-random tests to verify and achieve full functional coverage; Debug regression failures and analyze functional coverage gaps; Lead documentation of verification strategy and conduct reviews with design/architecture teams; Drive improvements in verification quality and efficiency.