ASIC Verification Engineer - New College Grad 2027
Core
Simulate RTL under various conditions to flush out design bugs early in the pre-silicon process, employing cutting-edge AI technologies to create automated systems and flows.
Role type
ASIC Verification Engineer (New College Grad)
Builds
GPU and processor reference models and testbench environments
Domain
Semiconductor / Hardware Verification
Deliverable
production ML models
Required skills
SystemVerilog, C++, UVM, RTL simulation, CPU/SoC architecture, OOP
Preferred skills
HW/SW interactions, functional testing (directed/random), GPU/Processor verification experience
Technologies
SystemVerilog, C++, UVM, AI tools
Responsibilities
Develop directed or random tests in SystemVerilog to verify reference C++ and RTL models; Debug RTL simulation failures; Contribute to complex UVM testbench environments including test development, automation, or analysis; Employ cutting edge AI technologies to create automated systems and flows.
Seniority
Entry-level (New College Grad 2027)
