Senior System Level Verification Engineer
Core
Lead design verification for complex ARM-based SoC hardware, focusing on chip-level verification, debugging, and ROM/Firmware bringup for network control and IoT systems.
Role type
Senior System Level Verification Engineer (SoC)
Builds
SOC system level test environments for simulation and emulation
Domain
Semiconductor / Hardware Design Verification
Required skills
System level verification, C programming, RTL debugging, CPU debug architecture, SOC system architecture, Device modeling (JTAG, UART, SPI, I2C), Test planning, Regression testing, Scripting (Make, Python, Perl, Shell)
Preferred skills
Emulation/FPGA/Post-silicon validation, Complex IP interface validation (USB, Ethernet, PCIe, DDR), AI tools for test planning
Technologies
ARM, C, Python, Perl, Shell, Make, JTAG, UART, SPI, I2C, Confluence, Jira
Responsibilities
Develop SOC system level test environment for simulation and emulation; Develop testplan and tests including error and stress tests; Run and debug tests in regressions; Work with other teams in root-causing HW issues; Validation ROM; Work with SW team in debugging device driver issues and OS boots
Seniority
Senior, hands-on IC
