Staff Design Reliability Verification Engineer
Core
Drive and develop reliability verification with design and product teams by planning, overseeing, and developing stress patterns for increased reliability coverage for DRAM products.
Role type
Staff Design Reliability Verification Engineer
Builds
High-reliability memory and storage solutions (DRAM)
Domain
Semiconductor / Memory / Storage
Required skills
CMOS operation and circuit design, Analog/digital simulation tools (HSPICE, VerilogHDL, FINESIM, SimVision, WaveViewer), CMOS degradation mechanisms (NBTI, CHC), Reliability modeling and simulation tools, Python
Technologies
HSPICE, VerilogHDL, FINESIM, SimVision, WaveViewer, Python
Responsibilities
Plan, oversee, and develop stress patterns for increased reliability coverage; Perform verification processes with modeling and simulation using industry standard simulators; Work with marketing, quality, and product engineering groups to ensure accurate manufacturability; Proactively solicit guidance from standards, CAD, modeling, and verification groups to improve design quality; Drive innovation into future memory generations; Work with technology teams to ensure high-risk reliability mechanisms are evaluated; Analyze and debug circuits down to device level in relation to degradation mechanisms; Develop and improve reliability verification tools and methodologies; Train and mentor junior engineers.
Seniority
Staff, hands-on IC with mentorship