Low Power ASIC Engineer - New College Grad 2027
Core
Architecting and developing testbenches, infrastructure, and testplans to verify power management solutions for NVIDIA GPUs and SOC architectures.
Role type
Low Power ASIC Design/Verification Engineer (New Grad)
Builds
Energy-efficient GPU and SOC architectures for AI, Automotive, GeForce, and Mobile products
Domain
Semiconductor / ASIC Design / Low Power Verification
Deliverable
production ML models
Required skills
Verilog, SystemVerilog, UVM, Low Power Design Techniques (Multi VT, Clock gating, Power gating, DVFS), Processor Architecture, Debug skills, Verdi, Incisive Low-Power, Synopsys VCS NLP
Preferred skills
Low Power Architecture, Low Power CV, Deep Learning, UPF, Python, PERL, C, C++, Makefile scripting
Technologies
Incisive Low-Power, Synopsys VCS NLP, Verdi, UPF
Responsibilities
Collaborate with Low Power Architecture, Design, and Software teams; Develop testbenches and verification infrastructure; Influence EDA vendors to improve simulation and debug efficiencies
Seniority
Entry-level, New College Grad
