ASIC Verification Engineer
Core
Plan and implement IP/Cluster/SOC functional verification for Graphics Processors and Tegra SOCs, including regression planning, coverage closure, and pre-silicon validation.
Role type
ASIC Verification Engineer
Builds
Graphics Processors and Tegra System-on-Chip (SOC) designs
Domain
Semiconductor / Hardware Design
Required skills
ASIC verification, RTL design verification, regression planning, functional coverage closure, XPROP simulations, GLS, System Verilog, UVM methodology, VCS simulation tools, Debussy debug tools, GDB debug tools
Preferred skills
Memory controller knowledge, FPGA verification, post-silicon debug, Python scripting, Perl scripting, Shell scripting
Technologies
VCS, Debussy, GDB, System Verilog, UVM, XPROP, GLS
Responsibilities
Own ASIC verification of IP/Cluster for complicated designs in RTL; Work with HW architects and designers to make implementation choices; Interact with Performance verification teams for dynamic simulations and formal verification; Ensure functional and code coverage of RTL; Partner with FPGA and S/W teams for software testing; Involved with post-silicon verification and debug
Seniority
Mid-level, hands-on IC
