ASIC Verification Engineering
1,761 open positions
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Senior Mixed Signal Design Verification Engineer NVIDIATaiwan, Hsinchu 4mo Verify design and implementation of industry-leading GPU and high-speed Serdes platforms for consumer graphics and AI.
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Staff engineer , ASIC AMS Verification Micron2 Locations 4mo Lead verification for high-speed DDR & ONFI PHY designs at advanced technology nodes, focusing on mixed-signal and analog-mixed-signal (AMS) integration.
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Principle DFT Engineer NxpBangalore, IN 4mo Implementing and verifying scan architectures, performing scan insertion, generating and analyzing ATPG patterns, and executing Gate-Level Simulation (GLS) for complex SoC designs.
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RTL Design Engineer Advanced Micro Devices, IncMARKHAM, Canada 4mo Design and verify block-level RTL IP and micro-processor subsystems for embedded security applications within System on Chip (SoC) products.
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Senior Digital Verification Engineer Samsung Research and Development Center IsraelTel Aviv-Yafo, Israel 4mo Architect and optimize scalable UVM-based verification environments and toolchains for next-generation imagery sensors (Mobile, AR/VR, Automotive).
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ASIC Design Verification Engineer, Technical Leader CiscoSan Jose, California, US $184k4mo Lead ASIC design verification for Silicon One hardware platforms, ensuring verification closure through simulation, emulation, and bring-up for Cisco's core Switching, Routing, and Wireless products.
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Director - IP Engineering (Technical Program Management ) GlobalFoundriesHsinchu 4mo Lead the development of high-performance compute processor IP products and drive execution strategy for multi-site R&D teams.
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Staff Silicon Power & Performance Engineer (System Level Test & Characterization) ArmBengaluru, India 4mo Plan and execute silicon power, performance, and thermal characterization activities across multiple projects to ensure flawless silicon performance.
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ASIC Verification - Team Lead MicrosoftUnited States, California, Santa Clara 4mo Leads pre-silicon verification strategies, test plans, and environments for complex SoC, subsystem, and IP flows to ensure design quality and performance.
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Verification Lead (Lead DV) LumilensSan Jose 4mo End-to-end verification lead for a first-of-its-kind chiplet, defining methodology, coverage strategy, and regression infrastructure before RTL availability.
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?Software Engineer Test & Verification (d/w/m) Lindenberg im Allgäu, BAYERN 4mo Define requirements for PLD/FPGA testing and equipment, develop and execute verification tool qualifications, and analyze customer products.
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Formal Verification Engineer AccentureBengaluru 4mo Ensure design correctness using mathematical methods like model checking and equivalence checking to detect corner-case bugs early in the design cycle.
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Principal Design Engineer CadenceBANGALORE 4mo Lead digital verification strategy and architecture for semiconductor/ASIC/SoC projects, defining methodologies, environments, and sign-off criteria.
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ASIC Verification Engineer HpeBengaluru, Karnātaka, India 4mo Architect and build block-level, subsystem, and full-chip verification environments for complex ASICs using SystemVerilog and UVM, ensuring tape-out readiness through rigorous functional and code coverage analysis.
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Career Accelerator Program - Mixed Signal Design Verification Engr Texas InstrumentsUnited States 4mo Developing verification plans, SystemVerilog test benches, and simulations for RTL and GLS to ensure first-pass silicon success for mixed-signal systems.
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Pre-Silicon Verification Engineer
AmazonHaifa, Haifa, Israel
4mo
Develop and execute comprehensive verification plans and test cases to validate hardware functionality and performance for semiconductor platforms.
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Principal DFT Engineer AnalogdevicesIndia, Bangalore, RMZ 4mo Architecting, implementing, and verifying advanced DFT solutions for complex digital ASICs and SoCs to ensure robust testability and manufacturing yield.
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AMS Engineer OlixAustin, TX 4mo Senior Mixed-Signal Verification Engineer owning verification of analog and mixed-signal blocks for high-speed IO RX/TX chains in a new AI computing accelerator.
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Design Verification Engineer BroadcomUSA-CA San Jose Innovation Drive $144k4mo Developing verification environments, agents, and test cases for state-of-the-art SoC and embedded IP subsystems using System Verilog and UVM.
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CPU HVM Functional-Test Verification Engineer IntelMalaysia, Penang 4mo Develop functional tests and validate DFT for manufacturing to qualify next-generation Intel CPU IP designs.
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AMS Verification Engineer Renesas-ElectronicsIstanbul, tr 4mo Verify analog/mixed-signal systems and develop event-driven models for analog IC components.
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Sr. ASIC Verification Engineer TensordyneRemote 4mo Lead all phases of ASIC verification to ensure pre-silicon correctness of next-generation processors for generative AI inference acceleration.
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DFT Architect AlteraPenang 15, Penang, Malaysia 4mo Define and govern next-generation DFT architecture for advanced FPGA, SoC, and multi-die silicon platforms, ensuring world-class testability and manufacturability.
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Senior Principal Verification Engineer ON SemiconductorBangalore, Karnataka, India 4mo Ensuring functional correctness, robustness, and quality of cutting-edge semiconductor and SoC designs through comprehensive verification planning, testbench development, and advanced simulation techniques.
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SoC Digital Verification Engineer (m/f/d) AppleMunich, Germany 4mo Develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors for large-scale SoC designs.
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Silicon Emulation Engineer WaymoMountain View (US-MTV-EMF690) $175k4mo Simulate future silicon designs and software on an emulation platform to enable functional and performance validation and left-shift of software development.
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