Design and Verification Engineer, Pathfinding
Core
Full-chip functional verification and mixed-signal circuit development for next-generation memory technologies.
Role type
Senior IC mixed-signal verification engineer
Builds
Advanced memory solutions (DRAM and emerging memories)
Domain
Semiconductor / Memory / Mixed-Signal
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, circuit-level verification, SPICE simulation, UNIX, Cadence environments, semiconductor physics, electronic circuits
Preferred skills
design-for-test (DFT), RTL verification, static timing analysis (STA), timing-accurate Verilog
Technologies
SystemVerilog, SPICE, Cadence, UNIX
Responsibilities
Perform full-chip functional verification on memory development projects; Develop verification plans based on composition specifications; Build SystemVerilog testbenches to achieve complete functional coverage; Apply SystemVerilog assertions and verification techniques; Collaborate with digital design teams to debug test cases; Perform mixed-signal circuit design
Seniority
Senior, hands-on IC
