Senior DFT Engineer - Hardware
Core
Architect, design, and validate test features for high-speed IOs and interconnects to ensure manufacturing testability of complex semiconductor chips.
Role type
Senior DFT Engineer (Hardware/Verification)
Builds
Scalable test solutions and test features for high-speed IOs across consumer graphics, self-driving cars, and AI products.
Domain
Semiconductor hardware design, high-speed IO, and digital verification
Required skills
Logic design, Architecture, Verification methodologies (UVM), Scripting (SV, Perl, Python), Mixed-signal understanding, Test coverage analysis
Preferred skills
Post-silicon testing experience, Automation flow development, Bug identification and fix, IOBIST test-logic design
Technologies
UVM, SystemVerilog (SV), Perl, Python, X-prop, Coverage metrics tools
Responsibilities
Develop unit-level and SOC/Full Chip test plans, Perform pre-silicon simulation and debug of test functionality, Collaborate with IP and Mixed Signal Circuit design teams, Partner with Post Silicon Test and Production Engineering teams, Solve complex mixed-signal test problems, Improve automation flows and coverage metrics
Seniority
Senior, hands-on IC
