Senior Mixed Signal Design Verification Engineer
Core
Verify design and implementation of industry-leading GPU and high-speed Serdes platforms for consumer graphics and AI.
Role type
Senior IC mixed-signal verification engineer
Builds
High-speed Serdes platform and GPU designs
Domain
Semiconductor / Mixed-Signal CMOS / GPU
Deliverable
production ML models
Required skills
Mixed-signal CMOS circuit design, verification scope definition, verification infrastructure development, System Verilog, test bench creation, HSpice/Finesim/XA simulation, deep sub-micron process knowledge
Preferred skills
Perl, C/C++ programming
Technologies
Cadence IC design environment, HSpice, Finesim, XA, System Verilog
Responsibilities
Verify Mixed Signal CMOS circuit design and architecture, develop verification infrastructure, verify correctness of design, craft test bench environments for component and top-level circuit verification
Seniority
Senior, hands-on IC