Manager, ASIC DV
Core
Leading verification of high-speed IPs (PCIe) and subsystems for memory and storage solutions, ensuring quality from architecture alignment through silicon bring-up.
Role type
Senior IC verification manager (ASIC DV)
Builds
High-speed IP and subsystems (PCIe, NVMe, NAND, AXI) for memory and storage products
Domain
Semiconductor / Memory and Storage / ASIC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM/SystemVerilog, PCIe protocol expertise (Root-Complex, Endpoints, SR-IOV), team leadership (10+ engineers), silicon bring-up, automation methodology, storage controller architecture, SOC verification
Preferred skills
PCIE-NVME, NAND, AXI interfaces, cross-geography collaboration, technical mentoring
Technologies
UVM, SystemVerilog, PCIe, NVMe, NAND, AXI
Responsibilities
Verify high-speed IPs and subsystems using UVM/SV methodologies, lead team execution and planning for scalable verification environments, interact with architecture/design teams to align flows, support silicon bring-up, plan team ramp-up for parallel IP verification
Seniority
Senior, hands-on IC with management
