CareerPlan

DFT Engineer - New College Grad

US, CA, Santa ClaraFull-time$116k–$190k2026-06-25 → 2026-11-10

Core

Design-for-Test (DFT) architecture, verification, and post-silicon validation for sophisticated semiconductor chips.

Role type

DFT Engineer (New College Grad)

Builds

DFT architecture, verification solutions, and post-silicon validation for NVIDIA chips.

Domain

Semiconductor / Hardware Design

Required skills

Scan test planning, BIST (memories and IOs), fault modeling, ATPG, fault simulation, verification and validation of test patterns, RTL design, clock design, STA, place-n-route, power analysis, Silicon debug, ATE bring-up

Preferred skills

Perl, Python, Tcl scripting

Technologies

Vendor EDA tools, ATE

Responsibilities

Develop DFT methodology and deployment strategies, partner with EDA vendors to develop new capabilities, collaborate with VLSI and Operations teams to deliver scan features, mentor junior engineers on test designs and trade-offs

Seniority

Junior, New College Grad