ASIC Verification Engineering
1,761 open positions
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Senior Staff Digital Verification Engineer (f/m/d) Renesas-ElectronicsRemote 4mo IC verification expert for sensor applications in automotive and industrial markets, focusing on sensor signal conditioners and analog mixed-signal simulations.
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Product Development Engineer AlteraSan Jose, California, United States $106k4mo Driving thermal characterization, system-level validation, and product performance optimization for next-generation FPGA products from development to high-volume manufacturing.
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SoC Physical Verification Engineer, HBM MicronFolsom, California, United States of America $97k4mo Define, execute, and drive sign-off quality physical verification flows for next-generation HBM logic die and memory-centric SoCs, ensuring design integrity from layout through first silicon.
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Senior Principal Emulation Engineer NxpBangalore 4mo Lead complex SoC emulation programs and drive end-to-end emulation model development for pre-silicon verification and validation.
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Senior Engineer-DFT ArmBengaluru, India 4mo Design and verification of digital test structures for semiconductor chips, focusing on scan compression, memory BIST, logic BIST, and silicon debug.
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Senior DFT Technical Manager MediaTekSan Jose, CA 4mo Lead DFT design and implementation for advanced SoC products while serving as the primary technical interface between customers and MediaTek engineering teams.
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Senior Staff Physical Verification CAD Engineer MarvellSingapore 4mo Developing next-generation automated design flow and add-on tools for physical verification (PV) to support Marvell's IC design infrastructure and methodology.
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Senior Hardware Validation & SI Correlation Engineer SambanovasystemsSan Jose, CA $210k4mo Validating high-speed electrical interfaces and system-level hardware for next-generation AI server systems to ensure flawless performance between simulation and silicon.
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Director / Senior Principal AI SoC Validation (Bring-up lead) GraphcoreBengaluru 4mo Lead post-silicon validation and bring-up for next-generation AI System-on-Chip (SoC) to ensure reliable pre-production software execution and quality before mass deployment.
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Functional Subject Matter Expert AccentureBengaluru 4mo Ensure functional correctness of System on Chip (SoC) systems by validating requirements, workflows, and expected system behavior against business processes.
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Senior / Staff Design Verification Engineer SiFiveAhmedabad, India 4mo Ensuring functional correctness of complex, next-generation SoCs/IPs through the entire verification lifecycle.
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Senior ASIC Verification Engineer NVIDIAUS, TX, Austin $136k4mo Verify design, architecture, and micro-architecture of high-performance SoCs and GPUs, focusing on memory subsystems and hardware/firmware interactions.
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Senior Principal Design Verification Engineer ON SemiconductorBangalore, Karnataka, India 4mo Define verification strategy and plans for embedded MCU, DSP systems, and cryptography hardware accelerators.
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Functional Verification Engineer QualcommBangalore, India 4mo Verify IP, Block, or Subsystem at SoC level for Qualcomm's next-generation electronic systems.
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Analog Mixed-Signal Design Verification Engineer - TeraWave BlueoriginSan Diego, CA, US $230k4mo Lead mixed-mode design verification methodology for complex System-on-Chips (SOCs) in analog mixed-signal circuits, defining co-simulation EDA environments and developing behavioral models.
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CPU DFT Manager IntelIndia, Bangalore 4mo Lead and technically guide a high-performing DFT team focused on X86 CPU DFT design and validation for silicon and platform solutions.
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Verification Engineer LumilensSan Jose 4mo Verify blocks and subsystems of a first-of-its-kind chiplet using UVM testbenches, driving coverage to closure, and debugging across simulation and emulation.
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?Software Engineer Test & Verification (all gender) Lindenberg im Allgäu, BAYERN 4mo Define requirements for PLD/FPGA tests and equipment, create verification documentation for complex aerospace systems, and develop/execute verification tool qualifications.
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Staff Design Verification Engineer AnalogdevicesUnited Kingdom, Edinburgh, SC, Freer 4mo Staff Design Verification Engineer responsible for pre-silicon verification of mixed-signal products, executing 100% verification coverage using DMS and AMS methods, and establishing best-practice verification flows.
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Sr. Design Verification Engineer Advanced Micro Devices, IncSanta Clara, California 4mo Build scalable verification environments and CPU-level testbenches for next-generation server processors to validate complex subsystems.
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ASIC Design Verification (DV) Manager HpeBengaluru, Karnātaka, India 4mo Leads and manages a team of individual contributors and project teams responsible for all stages of VLSI design, validation, and testing for complex products, solutions, and platforms.
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MBIST Technical Leader CiscoSan Jose, California, US $211k4mo Leading MBIST methodology and architecture for next-generation networking chips (Silicon One) to ensure silicon quality and yield.
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Senior Emulation Engineer Enchargeai36Remote 4mo Validating complex AI accelerator architectures on emulation platforms before tape-out to bridge hardware and software gaps.
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Senior Engineer Verification InfineonBangalore BTP 4mo Develop SystemVerilog RNM models and verification flows for analog/mixed-signal blocks within SoC-level power management ICs.
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