Junior Wireless SoC Design Verification Engineer
Core
Pre-silicon RTL verification for wireless System-on-Chip (SoC) blocks, subsystems, and top-level integration, focusing on coverage closure and signoff.
Role type
Junior IC design verification engineer (wireless SoC)
Builds
Reusable testbenches and verification environments for wireless silicon
Domain
Semiconductor / Wireless Connectivity (WiFi, Bluetooth)
Required skills
Constrained-random verification, Digital logic design, SOC architecture, Microarchitecture, Test planning, Coverage analysis, Regression testing, UPF (power intent), SystemVerilog, Verilog, UVM, Python scripting, C/C++ programming
Preferred skills
ASIC/SOC tape-out experience, MAC/PHY verification, Wireless protocol knowledge, PCIe/Bus fabric/NOC verification, Formal verification (JasperGold), Embedded CPU verification, Low-power verification, AI/ML in verification workflows
