DFT Engineer
Core
SoC DFT implementation, verification, and debug for ASIC designs.
Role type
DFT Engineer
Builds
ASIC/SoC designs with embedded test infrastructure
Domain
Semiconductor / ASIC Design
Required skills
DFT concepts (Scan, ATPG, BIST, JTAG), Verilog HDL, scripting (TCL, Perl, Python, C++), simulation tools, STA, silicon debug
Preferred skills
Professional experience in DFT domain
Technologies
Verilog, TCL, Perl, Python, C++, Linux, ATE
Responsibilities
Assist with DFT implementation including Scan, MBIST, TAP, and IO integration; Support ATPG vector generation, simulation, and verification; Debug test vectors before tape release and during ATE silicon bring-up; Work closely with senior engineers on STA and design closure for test; Automate DFT flows and scripts for improved engineering efficiency
Seniority
Entry to Mid-level
