Verification Engineer
Core
Develop and maintain SystemVerilog and UVM verification environments for next-generation media hardware (image signal processors, display processors, video codecs) used in automotive, IoT, and client devices.
Role type
Senior IC hardware verification engineer
Builds
Verification environments, test sequences, checkers, and functional coverage models for Media IP
Domain
Semiconductor hardware verification (Media IP)
Required skills
SystemVerilog, UVM, constrained-random verification, digital design concepts, RTL concepts, functional coverage, assertions, verification planning, scripting/automation
Preferred skills
AMBA protocols (APB, AHB, AXI), formal verification, assertion-based verification, regression automation, CI/CD, Linux development, Python scripting, AI-assisted verification tools, functional safety
Technologies
SystemVerilog, UVM, Python, Linux, CI/CD, AMBA protocols
Responsibilities
Develop and maintain verification environments; Create and run constrained-random and directed tests; Analyse simulation results and debug functional failures; Contribute to verification planning and coverage closure; Develop automation scripts; Collaborate with RTL design and other engineering teams; Explore AI-assisted verification approaches
Seniority
Mid-to-Senior, hands-on IC