Verification Engineer, PCIE
Core
Verify ASIC design, architecture, golden models, and micro-architecture of PCI Express controllers at IP/sub-system levels.
Role type
Senior IC verification engineer (PCI Express)
Builds
Reusable bus functional models, monitors, checkers, and scoreboards
Domain
Semiconductor hardware design (ASIC/SoC) and interconnect protocols
Required skills
Verilog, SystemVerilog, UVM, coverage-driven verification, functional coverage, constrained random verification, ASIC design verification, IP/interconnect protocol verification
Preferred skills
PCI Express Gen3+ protocol knowledge, CXL system architecture, Perl/Python scripting, debugging, analytical skills
Technologies
UVM, Verilog, SystemVerilog, Perl, Python
Responsibilities
Define verification scope, develop test plans/tests, build verification infrastructure, verify design correctness, collaborate with architects and designers
Seniority
Senior, hands-on IC
