Design Verification Engineer
Core
Verify functionality and performance of Apple's premier System-on-Chips (SOCs) and IP subsystems by developing test plans, tests, and coverage strategies.
Role type
Design Verification Engineer
Builds
Apple's premier SOCs and IP subsystems
Domain
Semiconductor hardware design
Required skills
Verilog, SystemVerilog, digital simulation, debug, Python, Perl, C/C++, assembly, computer architecture, digital design fundamentals
Preferred skills
Independent project delivery, scripting languages
Technologies
Verilog, SystemVerilog, Python, Perl, C, C++, assembly
Responsibilities
Review design and architecture specifications, develop test plans and coverage plans, run and triage regressions, track bugs, analyze coverage, collaborate with design and micro-architecture teams
Seniority
Entry-level, hands-on IC
