ASIC Verification Engineering
1,774 open positions
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Design Verification Engineer OpenAISan Francisco 1y Verify functional correctness and robust design for custom AI-native silicon and system-level solutions powering frontier AI models.
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Senior Staff Engineer Verification InfineonAhmedabad (India) 1y Architecting complex module/subsystem/full chip testbenches and building verification infrastructure for ASIC verification.
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CPU Processor Power Management Verification Engineer AppleSanta Clara, United States of America 1y Verify functionality correctness of Power Management and Clock Control logic in CPU processor designs.
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Computing System Architecture Engineer MediaTekHsinChu 1y Building pre-silicon system emulation platforms and simulation environments for xPU integration and debugging.
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MEMS - Digital Verification - SR STMicroelectronicsToulouse, France 1y Digital Verification engineer developing testbenches, verification components, DSP models, and digital control logic for ASICs within the MEMS domain.
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Chip Design Verification Engineer NVIDIAIsrael, Tel Aviv 1y Design and implement next-generation Switch Silicon chips, focusing on front-end design and verification of chip blocks.
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Design Verification Engineer - Interface IP EtchedSan Jose 1y Design Verification Engineer for Interface IP subsystems ensuring correctness and performance across the hardware-software stack.
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Sr Principal Design Engineer CadenceBANGALORE 1y Lead VLSI design verification engineering for complex chip designs, ensuring functional correctness through advanced verification methodologies and automation.
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Design Verification Engineer Texas InstrumentsIndia 1y Confirm accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry before pattern generation/mask development; analyze equipment to establish operating data and conduct experimental tests to confirm devices meet…
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Team Lead Verification Engineer↗ SemifyGraz, ST, AT 1y Performing functional verification, validation, and debugging of digital designs for RISC-V based microcontroller systems, ASICs, and FPGAs.
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Staff/Senior Staff Engineer - AMS Verification SilabsHyderabad 1y Design verification of next generation IP/SoCs with emphasis on verifying and signing off performance, power, and functionality using RNM models.
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Principal Engineer Renesas-ElectronicsNoida, in 1y Lead full-chip emulation and FPGA prototype development for complex automotive SoC designs to ensure zero-bug silicon tape-out.
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Senior ASIC Design Verification Engineer EthernoviaSan Jose, CA $200k2y Responsible for all aspects of digital SoC verification for advanced automotive communication semiconductors and systems.
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Emulation Engineer NuvotonHerzliya, Israel 2y Develop and maintain emulation models from RTL for complex SoC designs, port designs into emulation platforms, and debug hardware/software issues in pre-silicon environments.
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