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Senior ASIC Design Verification Engineer

San Jose, CA💼 Full-time💰 $200,000–$200,000🗓 2024-10-09 → 2026-09-28

Core

Responsible for all aspects of digital SoC verification for advanced automotive communication semiconductors and systems.

Role type

Senior IC ASIC Design Verification Engineer

Builds

Automotive communication chips and systems

Domain

Automotive networking and semiconductor design

Deliverable

production ML models | product features

Required skills

ASIC verification fundamentals, UVM, Verilog/System Verilog, Python, TCL, C/C++, full verification flow, coverage analysis, gate level simulation, debugging simulation failures

Preferred skills

Networking protocols (Ethernet MAC/PHY, Switching, TCP/IP, PCIe), Video standards/protocols, Digital signal processing, Third party IP integration (SerDes, controllers), Modular testbench architecture, Test infrastructure re-use, EDA tool automation, SystemC, DPI

Responsibilities

Plan and execute verification and validation of advanced automotive communication semiconductors and systems; Debug simulation failures to root cause problems; Collaborate with architects, designers, and SW engineers

Seniority

Senior, hands-on IC

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