Analog/Mixed-Signal Design Verification Engineer
Core
Develop and maintain UVM-based verification environments for Analog/Mixed-Signal (AMS) IP and chips, creating test benches, drivers, checkers, and assertions to achieve functional and code coverage goals.
Role type
AMS Design Verification Engineer
Builds
Scalable and portable test benches, test cases, drivers, checkers, assertions, and reference models for AMS IP and chip verification
Domain
Semiconductor / Analog and Mixed-Signal Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM, RTL simulation, Gate Level simulation, Test bench development, Driver/Checker development, Assertion writing, Coverage closure, AMS IP knowledge
Preferred skills
Digital DV skills, Process improvement methodologies
Technologies
UVM, RTL, Gate Level simulators
Responsibilities
Develop configurable test benches, drivers, and checkers; Build test suites to meet coverage goals; Collaborate with architecture, design, and post-Silicon teams; Improve AMS DV processes for quality and efficiency
Seniority
Individual Contributor