MEMS - Digital Verification - SR
Core
Digital Verification engineer developing testbenches, verification components, DSP models, and digital control logic for ASICs within the MEMS domain.
Role type
Senior IC digital verification engineer (ASIC)
Builds
ASIC verification testbenches and simulation cases for industrialization
Domain
Semiconductor / MEMS / Digital ASIC
Required skills
System Verilog, Universal Verification Methodology (UVM), digital simulator tools, testbench automation, bugs analysis, coverage analysis, DSP modeling, test case development
Preferred skills
Formal verification, communication protocols (I2C, SPI, I3C), Python scripting, TCL scripting
Technologies
System Verilog, UVM, Python, TCL, Digital Simulators
Responsibilities
Define and develop verification testbenches, develop verification components and DSP models, create simulation test cases, debug failures
Seniority
Senior, 3-5 years experience
