Principal Engineer
Core
Lead full-chip emulation and FPGA prototype development for complex automotive SoC designs to ensure zero-bug silicon tape-out.
Role type
Principal Emulation Engineer (Hardware Assisted Verification)
Builds
Full chip emulation models, FPGA prototypes, and test sanity suites for automotive SoCs
Domain
Semiconductor / Embedded Systems / Automotive SoC Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Emulation platform expertise (Palladium, Protium, Veloce, Zebu, EP), Verilog/VHDL SoC design, System Verilog/UVM/C++ verification, automation scripting (Perl/TCL/bash/Python), waveform debug tools (Simvision/Verdi), EDA vendor technology deployment
Preferred skills
Communication/interface protocols (MIPI, PCIe, UCIe, ENET, LPDDR5/4, eMMC, UFS), DFT and GLE flows, AI workload performance knowledge
Responsibilities
Create full chip emulation and FPGA prototype models for complex automotive SoC designs; Create the test sanity suite to validate models with integrated transactors and memory models; Develop and apply automation aids, flows and scripts to improve emulation ease of use; Innovate improvements to emulation methodology working with partners across geographies; Train and mentor engineers to deliver high quality and increase productivity; Drive SoC verification using emulation (Hardware Assisted Verification) to execute system-level-scenarios; Work with EDA vendors to deploy next generation emulation technologies
Seniority
Principal, hands-on IC with mentorship
