Senior Principal Design Verification Engineer
Core
Define verification strategy and plans for embedded MCU, DSP systems, and cryptography hardware accelerators.
Role type
Senior Principal Digital IC Verification Engineer
Builds
Embedded MCU and DSP systems, hardware accelerators for cryptography
Domain
Semiconductor / Digital IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, UVM, constrained random driven verification, assertion-based verification, formal verification, verification planning, requirements tracking, functional coverage, regression management, technical project leadership
Preferred skills
Python for automation, C/C++ for embedded software, SystemRDL, IP-XACT, CPU/MCU subsystem verification, 3rd party verification IP deployment
Technologies
SystemVerilog, UVM, Python, C, C++, SystemRDL, IP-XACT
Responsibilities
Define verification strategy and detailed verification plans for blocks and systems; Coordinate/lead verification activities in project teams; Develop SystemVerilog/UVM environments for blocks and top-level SoCs; Debug functional errors in RTL; Participate in verification methodology improvement activities; Coach and mentor younger engineers
Seniority
Senior Principal, hands-on IC with leadership
