Senior Emulation Engineer
Core
Validating complex AI accelerator architectures on emulation platforms before tape-out to bridge hardware and software gaps.
Role type
Senior Emulation Engineer
Builds
Pre-silicon validation environments for high-performance, low-power AI inference silicon
Domain
Semiconductor design / AI hardware / Edge-to-cloud computing
Deliverable
production ML models
Required skills
SoC design, emulation platforms (Veloce, Palladium, ZeBu), FPGA prototyping (proFPGA, HAPS, Protium), high-speed I/O interfaces (PCIe, UCIe), memory technologies (LPDDR, HBM), RTL (Verilog/SystemVerilog), digital design, hardware debug tools, scripting (Python, Tcl, Perl), UVM, C/C++
Preferred skills
SystemVerilog, UVM-based verification, software development
Technologies
Siemens Veloce, proFPGA, HAPS, Protium, PCIe, UCIe, LPDDR, HBM, Verilog, SystemVerilog, UVM, Python, Tcl, Perl, C, C++
Responsibilities
Set up and maintain Siemens Veloce emulation and prototyping platforms; Adapt SoC designs for Emulation and Prototyping; Develop and debug emulation testbenches and system-level environments; Support pre-silicon validation, power/performance analysis, and early software bring-up; Collaborate with design and verification teams to isolate design issues; Optimize performance of the emulation workloads and reduce turnaround time; Work with firmware/software teams to enable use of emulators for OS and driver testing
Seniority
Senior, hands-on IC
