Staff SoC RTL Performance Verification and Emulation Engineer
Core
Analyze SoC performance bottlenecks, drive architectural improvements, and build early performance analysis platforms for future Arm System/SoC architectures.
Role type
Staff SoC RTL Performance Verification and Emulation Engineer
Builds
Early performance analysis platforms for system technology exploration on future Arm SoC architecture
Domain
Semiconductor / SoC Design / Performance Engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SoC RTL performance analysis and debug, hardware emulation platform expertise, emulator bring-up and configuration, system-level performance debug (CPU/GPU/I/O), memory system architecture and interconnect design, Verilog, SystemVerilog, C/C++, Python or Ruby scripting, multiprocessor coherency and cache architectures
Preferred skills
Unix/Linux proficiency, source control systems (Git/Subversion), CPU instruction set familiarity, ARM architecture familiarity, compiler/assembler/device driver experience
Technologies
Verilog, SystemVerilog, C, C++, Python, Ruby, Git, Subversion
Responsibilities
Perform RTL performance analysis and verification for SoC, provide technical leadership collaborating with architecture and design teams, implement performance verification plans using simulation and emulation, drive emulation-based performance studies including emulator bring-up, conduct theoretical analysis of memory system optimizations, debug performance failures and propose architectural solutions, develop debug infrastructure and visualization tools, leverage AI-based tools for automation, mentor junior engineers
Seniority
Staff, hands-on IC with mentorship