Sr. Design Verification Engineer
Core
Build scalable verification environments and CPU-level testbenches for next-generation server processors to validate complex subsystems.
Role type
Senior IC design verification engineer (CPU infrastructure)
Builds
Scalable CPU testbench infrastructure and verification environments
Domain
Semiconductor / CPU Design Verification
Required skills
C++, SystemVerilog, UVM, RTL design, CPU microarchitecture, testbench development, debugging with software models
Preferred skills
Python scripting, Perl, design verification background, memory/networking verification
Technologies
C++, SystemVerilog, UVM, Python, Perl, Verilog
Responsibilities
Develop and maintain CPU-level testbench infrastructure; Build scalable verification environments; Write and enhance tests and components; Collaborate with global design and debug teams; Debug testbench and design issues; Contribute to verification quality metrics and coverage closure; Support integration of testbench infrastructure with broader workflows
