Senior ASIC Verification Engineer, Coherent High Speed Interconnect
Hybrid
Core
Verify high-speed coherent interconnect design, architecture, and golden models for mobile SoCs and GPUs.
Role type
Senior IC ASIC verification engineer (coherent interconnects)
Builds
High-speed coherent interconnects for mobile SoCs and GPUs
Domain
Semiconductor / High-speed interconnects
Required skills
System Verilog, UVM, C++, random stimulus generation, functional coverage, assertion-based verification, testbench architecture, debugging
Preferred skills
PCIE, CXL, CHI protocols, mentoring junior engineers
Technologies
VCS, Debussy, GDB
Responsibilities
Develop verification infrastructure (Testbenches, BFMs, Checkers, Monitors), define verification scope and test/coverage plans, verify design correctness, collaborate with architects and silicon verification teams
Seniority
Senior, hands-on IC
