Senior DFT Technical Manager
Core
Lead DFT design and implementation for advanced SoC products while serving as the primary technical interface between customers and MediaTek engineering teams.
Role type
Senior DFT Technical Manager
Builds
Advanced SoC products
Domain
Semiconductor / Digital Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
DFT architecture, scan insertion, ATPG, MBIST/LBIST, test coverage closure, DFT verification, silicon bring-up, diagnosis, production issue resolution, EDA tools, customer communication, cross-functional coordination
Technologies
EDA tools
Responsibilities
Lead DFT architecture, planning, implementation review, and tape-out readiness activities; Serve as the primary technical interface for customers on DFT design, scan architecture, ATPG, MBIST/LBIST, test coverage, DFT verification, silicon bring-up, diagnosis, ATE correlation, and production-related issues; Guide customers and internal teams on DFT methodology, implementation flow, coverage closure, pattern generation, DFT signoff, and debug strategy; Review and drive quality of pre-silicon DFT deliverables, including scan insertion, test compression, MBIST/LBIST integration, boundary scan, ATPG patterns, coverage reports, DFT rule checks, and simulation results; Lead customer technical discussions, design reviews, DFT implementation reviews, issue triage meetings, root-cause analysis, and corrective-action planning; Translate customer requirements, design constraints, failure data, logs, waveforms, ATPG reports, diagnosis results, and ATE data into clear debug plans and engineering actions; Drive customer-reported issues from initial report through reproduction, containment, root-cause identification, solution validation, and formal closure; Coordinate cross-functional debugging with DFT, RTL/design, verification, physical design, package, firmware, product engineering, test engineering, and silicon validation teams; Define issue ownership, priority, milestones, escalation paths, and closure criteria for customer-critical technical issues; Communicate technical findings, risks, workarounds, debug status, and resolution schedules clearly to customers and internal management; Support customer design-in, DFT signoff, tape-out readiness, silicon bring-up, qualification, yield improvement, and mass-production ramp; Identify gaps in DFT methodology, validation coverage, debug flow, automation, and documentation based on customer feedback and silicon learning; Capture lessons learned and convert them into reusable DFT guidelines, implementation checklists, debug procedures, validation improvements, and best practices.
Seniority
Senior, hands-on IC