Analog IC Design
1,390 open positions
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New College Grad - IC Package Layout Engineer MicronBoise, ID - Main Site 17d Design and verify layouts for advanced semiconductor packages (DDR, LPDDR, GDDR, NAND, ASIC) used in memory and storage products.
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Analog IC Design Engineer, Intern MarvellPavia, Italy $21k–$29k17d Design integrated circuits for electrical and electro-optical interfaces at 100+ Gb/s using advanced technology nodes (3nm FinFET and 2nm GAAFET) for AI and Cloud data center applications.
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Summer 2027 Internships - Design Engineering SilabsAustin 17d Summer 2027 internship for early-career students to work on semiconductor design projects including analog/mixed-signal, digital, verification, physical design, RF, or design automation.
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Analog Layout Engineer AccentureBengaluru 17d Design the physical layout of analog circuits, ensuring proper component placement and routing for optimal performance while addressing parasitic effects, signal integrity, and power distribution.
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ENGR PRIN, DESIGN LAYOUT; DSGN ON SemiconductorBangalore, Karnataka, India 17d Lead physical layout implementation of complex analog and mixed-signal blocks including ADCs, PLLs, Bandgaps, References, LDOs, Bias circuits, and image sensor-related analog IPs.
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System Engineer | Audio Texas InstrumentsDallas, TX, United States 17d Define product strategies, drive design wins, and support system-level IC applications across automotive, industrial, consumer, and computing markets.
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?(Senior) Development Engineer- Protection & Filtering (m/w/d) Hamburg, HAMBURG 17d Develop next-generation discrete ESD and TVS protection devices for high-speed, RF sensitive and automotive applications, acting as a system architect for product performance and technical concept definition.
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Sr. Mixed Signal ASIC Systems Engineer↗ Sitime CorporationOttawa, ON, CA $96k–$132k17d First-line systems engineer for new MEMS timing ASIC devices, ensuring they meet specifications and function within larger systems before customer release.
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Analog ASIC Electrical Engineer - 966 QuantinuumUS Broomfield, CO 17d Lead the development of ASIC designs for Apollo and Lumos quantum computers, focusing on analog CMOS circuit design and integration with complex electrical systems.
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Director Engineering, Analog Design (Power ICs) - Chip Lead Renesas-ElectronicsBengaluru, KA, in 18d Define optimum system architecture for application-specific ICs serving India market requirements across automotive, industrial, power, and mixed-signal applications.
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Mixed-Signal CMOS Design Engineer FlirUS - Camarillo, CA $91k–$91k18d Design and develop mixed-signal CMOS integrated circuits and readout integrated circuits for next-generation infrared imaging sensors.
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Package Design Engineer BroadcomUSA-CA San Jose Innovation Drive $83k–$83k18d IC package-design engineer for complex flip-chip-BGA packages enabling high-speed SerDes and very-high-power delivery for AI, networking, HPC, and 5G base stations.
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R&D Engineer LumentumRemote - Israel 18d Design, test, and characterize optical transceivers and high-speed communication modules for data-center and AI network architectures.
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Staff Systems Design Engineer AnalogdevicesUS, CA, San Jose, Rio Robles $151k–$151k18d Drive next-generation mixed-signal IC products from concept through production silicon, working across analog, digital, firmware, and system architecture.
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Memory Circuit Design Engineer - TCAM/SRAM CiscoZhubei, Taiwan 18d Design, develop, and test TCAM and SRAM memory circuits for electronic systems, ensuring performance, reliability, and safety standards.
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IC Design Engineer Manatal Test accountMilton, Queensland 19d Design and develop integrated circuits for consumer electronics, automotive, and industrial products.
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Design Engineer↗ ArmKA, IN 19d Develop and optimize Arm custom standard cells for advanced sub-3nm process technologies to improve power, performance, and area (PPA) of SoCs.
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Analog IC Design Engineer↗ Tetramem Singapore Pte. Ltd.Singapore, S00, SG 19d Design and development of high-performance analog integrated circuits including amplifiers, data converters, and voltage regulators.
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?Silicon Photonics PIC Design & Process Engineer↗ Clementi, S00, SG 19d Physical implementation and manufacturability of silicon photonic integrated circuits (PICs), bridging design and semiconductor manufacturing for AI data center infrastructure.
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Research Fellow (IC Design and academic) NtuNTU Main Campus, Singapore 19d Design and realize high speed high efficiency analog/RF ICs, specifically RF power management ICs, while supporting teaching activities.
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Senior Engineer Analog Mixed-Signal Design (f/m/div)↗ Infineon TechnologiesVillach, K, AT $47k–$47k19d Design analog/mixed-signal blocks and ensure top-level functionality for semiconductor solutions in power systems and IoT.
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?Silicon Photonics Chip & System Architecture Engineer↗ Clementi, S00, SG 19d Define system-level architecture for next-generation high-speed silicon photonics solutions (800G, 1.6T, 3.2T), translating requirements into chip-level optical and electrical specifications.
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Engineer (Semicon, One North)↗ PersolSingapore, S00, SG $8k–$8k19d Custom Layout Engineer supporting physical implementation of Foundation IP, Analog IP, and RFIC designs across advanced semiconductor process technologies.
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Entry Level Digital Physical Design Engineer NxpAustin (Oakhill, Office) 19d Entry-level engineer supporting physical design activities including layout implementation, rule checks, and design data preparation for semiconductor products.
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Analog Circuit Design Engineer IntelIndia, Bangalore 19d Design, develop, and build analog circuits in advanced process nodes for analog and mixed-signal IPs, optimizing for power, performance, area, timing, and yield.
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IC Digital Design Intern SonyglobalLysaker 19d Design and development of advanced CMOS image sensors, specifically timing/control signals for pixel array readout, amplifiers, ADCs, signal processing blocks, I/O interfaces, and low noise power supplies.
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PRINCIPAL R&D/PRODUCT DVL ENGINEER Te-ConnectivityUSA 20d Lead end-to-end product development of high-speed, fine-pitch, large-size sockets for digital data networks, focusing on concept development, design validation, and customer collaboration.
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Principal Design Engineer CadenceHYDERABAD 22d Architect, design, and deliver high-speed Analog/Mixed-Signal IPs and subsystems for next-generation connectivity and memory interfaces.
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Senior Mask Layout Design Engineer NVIDIATaiwan, Hsinchu 22d Perform physical layout for mixed-signal functions (PLLs, high-speed I/O, ESD structures) in sub-micron CMOS technologies.
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Senior Staff Advance Packaging Engineer↗ AMDBedok, S00, SG 22d Lead end-to-end package design execution for complex heterogeneous integration products (2.5D/3D, chiplet-based) to ensure performance, cost, and schedule targets.
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