Analog IC Design
2,195 open positions
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SiP Simulation and Virtual Prototyping Specialist (m/f/d) AUMOVIO SE HaupverwaltungDeutschland 13d Establishing and maintaining multidisciplinary simulation and EDA tool chains for SiP feasibility, design studies, and virtual prototyping across die, interconnect, package, and board boundaries.
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SOC Thermal Engineer AppleAustin Metro Area, United States of America 13d Design and validate cooling solutions for high-performance computing systems, focusing on mobile device thermal performance and advanced IC packaging research.
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Senior Signal Integrity Engineer – Cryogenic Interconnects NVIDIAUS, CA, Santa Clara $168k13d Develop accurate 3D EM models for PCB and interconnect structures and simulate multi-layer PCB designs under cryogenic conditions to define high-speed constraints and design guidelines.
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Design Engineer CadenceSHANGHAI, CN 13d Custom layout floorplan, matching guides, resistor/capacitor placement, coupling & noise reduction, and routing for sensitive and mixed-signal signals.
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Client Electrical Validation Engineer IntelMexico, Guadalajara 13d Validate circuit analog performance, electrical signal integrity compliance, and system-level margins for Intel's next-generation silicon products.
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Advanced Packaging Design Engineering Team Lead (Hybrid) CiscoSan Jose, California, US $187k13d Lead complex advanced IC package design programs for high-performance Silicon ASICs, driving planning, optimization, and execution from concept through tapeout.
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Client Electrical Validation Engineer↗ Intel CorporationGuadalajara, JAL, MX 13d Validate circuit analog performance, electrical signal integrity compliance, and system-level margins for Intel's next-generation silicon products.
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Associate Designer, CAD Engineering AnalogdevicesPhilippines, Cavite (jp) 13d Design and layout of Printed Circuit Boards (PCB) for Automatic Test Equipment (ATE), Customer Evaluation, and Engineering boards.
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Staff CAD Engineer (Power Signal Integrity) MarvellBangalore, IN 13d Develop and maintain Power Signal Integrity (PSI) signoff methodology, flows, and automation for block-level and full-chip static/dynamic IR/EM analysis in advanced semiconductor nodes.
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Advanced Packaging Technology & Integration Leader AppliedmaterialsSanta Clara,CA $200k–$275k13d Lead the development of next-generation semiconductor packaging and 3D integration technologies, combining deep technical expertise with first-principles problem solving to advance AI and HPC architectures.
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Senior Optical Engineer↗ AverroOttawa, Ontario, Canada $150k13d Lead simulation and design of photonic integrated circuits (PICs) using commercial tools and custom Python code.
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Semiconductor Laser Engineer↗ Harper Evans RecruitmentLondon Area, United Kingdom £75k–£100k13d Lead the development of advanced semiconductor laser devices (VCSEL and cavity design) from simulation through to fabrication and product integration.
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Senior RF/mmWave IC Design Engineer, 24 months↗ University College DublinDublin, County Dublin, Ireland €65k–€80k13d Direct engineering execution, layout synthesis, and top-level integration of a sub-THz transceiver SoC for next-generation communication and sensing applications.
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Senior Staff Engineer, Electrical Design Renesas-ElectronicsMorrisville, North Carolina, us 13d Design complex next-generation analog and power management ICs including operational amplifiers, regulators, and data converters for consumer and industrial markets.
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Senior Optical Packaging Engineer PsiQuantumMilpitas, California $183k–$200k13d Developing high-performance, robust fiber-to-chip packages and scalable packaging processes for optical systems integrating fibers with photonic integrated circuits.
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Senior AMS Verification Engineer – Oulu Bosch-GroupOulu, Pohjois-Pohjanmaa, fi 13d Senior AMS Verification Engineer developing mixed signal ICs for consumer market space, ensuring design integrity through comprehensive simulations and building top-level verification environments.
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Staff PCB Layout Design Engineer NetradyneOffice - Bengaluru 13d Lead design and delivery of complex, high-density multilayer PCB layouts for embedded computing, vision, connectivity, and power applications.
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Sr Manager Package SIPI, Annapurna Labs
AmazonCupertino, California, United States
$241k–$350k14d
Lead a team of engineers to deliver Signal & Power Integrity (SI/PI) solutions for next-generation 2.5D/3D chiplet-based products, covering architecture through high-volume production.
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High Bandwidth Memory Design Architect - E1 to SMTS MicronRichardson, Texas, United States of America 14d Analyze, model, and pathfind next-generation High Bandwidth Memory (HBM) architectures to optimize performance, power, area, thermal behavior, and reliability for AI and high-performance computing systems.
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Ingeniero/a de Fotónica Integrada / Silicon Photonics↗ Amaris Consulting | Part of MantuRemote 14d Design and develop integrated photonic circuits (PICs) from layout to tape-out, collaborating with electronics, optics, RF, packaging, and test teams for applications in telecommunications, optical communications, space, and sensing.
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Staff Signal Integrity Engineer ArmMultiple locations $209k–$283k14d Drive signal integrity (SI) design, simulation, optimization, and validation for next-generation AI Superchip and data center computing platforms, focusing on high-speed interconnects across silicon, packaging, and system platforms.
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PIC Project Engineer↗ Enablence USA Components, IncOttawa, ON, CA $66k–$135k14d Lead customer NRE and internal R&D projects on silica-on-silicon planar lightwave circuit (PLC) platforms, acting as the technical point of contact from design through fabrication, test, and delivery.
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Principal Signal Integrity Engineer HpeColorado Springs, Colorado, United States of America 14d Define signal integrity strategy and architect next-generation storage networks to enable industry-leading platform performance.
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Part-Time Lecturer in School of Electrical & Electronic Engineering – NM 6009 NtuNTU Main Campus, Singapore 14d Teach postgraduate course on analog integrated circuit design (RF IC Design) to students in the NTU-TUM MSc Programme.
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High-Speed SERDES Standards Specialist↗ NokiaLisbon, Lisbon, Portugal 14d Define and align 400 Gb/s-per-lane and higher high-speed electrical I/O and SERDES standards (IEEE 802.3, OIF) with Nokia product strategies.
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High-Speed Analog & Mixed-Signal PHY Design Engineer QualcommSan Diego, California, United States of America 14d Design next-generation SerDes PHY blocks for SoCs in leading-edge CMOS nodes (7nm+), focusing on low-power analog and mixed-signal circuit designs.
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Senior Package Layout Engineer SemtechCAN - Ottawa, ON, CA CA$105k–CA$122k14d Develop multi-layer substrate and carrier layouts for 2D, 2.5D, and 3D IC configurations and wafer-level interconnects using redistribution layers.
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Serdes Silicon Design and Micro-Architecture Engineer Advanced Micro Devices, IncSan Jose, California 14d Design and verify high-performance electrical and optical transceivers (Serdes) for next-gen processors and AI systems.
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Advanced Semiconductor/MEMS Layout & Routing Engineer - 1106 QuantinuumUS Brooklyn Park, MN 14d Translate complex ion trap device concepts into manufacturable mask layouts from initial design through verification and tapeout.
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Senior Analog IC Layout Engineer SemronDresden, DE (primary site) 14d Implement high-quality analog and mixed-signal layouts and drive full-chip physical integration for CapRAM-based AI hardware.
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Analog Validation Engr NxpNoida, IN 15d Develop bench characterization test methodologies and automated code to verify functional and electrical performance of analog IPs (ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, IO PADs) across PVT conditions for Automotive, Industrial, and Consumer…
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Principal RFIC Design Engineer↗ Maxlinear Inc.Paterna, VC, ES 15d Lead the architecture, design, simulation, and verification of complex RF, analog baseband, data-converter, SerDes, and mixed-signal circuits from specification through tapeout and production.
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Principal RFIC Design Engineer↗ MaxlinearPaterna, Valencian Community, Spain 15d Lead the architecture, design, simulation, and verification of complex RF, analog baseband, data-converter, SerDes, and mixed-signal circuits from specification through tapeout and production.
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