Analog IC Design
1,390 open positions
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Platform Hardware Design Engineer IntelUS, Oregon, Hillsboro $164k–$232k9d End-to-end development of platform hardware, translating system requirements into circuit and component-level specifications.
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Substrate Layout Design Engineer↗ Eridu AISaratoga, CA, US 9d Own end-to-end physical layout and routing of large, high-density, multi-die organic packages and modules, including high-speed interface boards.
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Stage ingénieur : mmW IC Designer Conception d'un amplificateur de puissance RF pour radar automobile évolutif (F/H) NxpGrenoble 9d Design a Power Amplifier (PA) demonstrator and benchmark CMOS vs. BiCMOS technologies for next-generation automotive radar transmit chains.
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Principal Analog/Mixed Signal CAD Engineer MarvellSanta Clara, CA $151k–$226k9d Architect, deploy, and maintain analog/mixed-signal simulation environments and automated design flows for advanced CMOS FinFET and BiCMOS technologies to support Marvell's IC development.
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Senior Staff Engineer, Layout Design (Power & Analog ICs) Renesas-ElectronicsBengaluru, KA, in 10d Senior individual-contributor responsible for translating circuit requirements into robust, manufacturable layouts for power and analog IC products (PMICs, regulators, gate drivers, BMS).
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Silicon, Hardware, & Photonics Engineering - Internship LightmatterBoston, MA $83k–$83k10d Intern role supporting the design, simulation, testing, and integration of silicon photonics engines and photonic interconnects for AI data centers.
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Principal Mixed-Signal Design Engineer, Data Converters K2spacecorporationUnited States - Remote $190k–$190k10d Lead architecture and development of wideband, high-performance data converters and associated analog front-ends for advanced mixed-signal SoCs in high-power satellite platforms.
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Senior Analog Design Engineer↗ Intel CorporationSanta Clara, CA, US $142k–$142k10d Design and validate high-speed analog and mixed-signal integrated circuits for silicon photonics optical interconnect products.
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Senior Analog Layout Designer OlixAustin, TX 10d Create layouts for RX/TX lane macros and support lane-level integration for high-performance decode accelerators.
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Senior Engineer, Analog Design Engineering AnalogdevicesTaiwan, Taipei, Songgao 10d Designing transistor-level analog/mixed-signal circuits and validating performance in the lab for consumer IC products.
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ASIC Engineering Analog Design Leader:ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years CiscoBangalore, India 10d Design and verify high-speed analog/mixed-signal circuits for silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda optical transceivers.
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Sr. Principal Engineer: Silicon Photonics-Hybrid Integration LumentumUSA - CA - San Jose (Ridder) $150k–$150k10d Lead the development of high-volume process flows for hybrid integration of unique materials to enhance Silicon photonics performance for cloud and network applications.
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Senior Analog IC Design Engineer ON SemiconductorMarin-Epagnier, Neuchatel, Switzerland 10d Design and develop precision analog/mixed-signal IP components for automotive, industrial, and medical products.
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Principal Mixed-Signal Design Engineer, Data Converters↗ K2 SpaceLos Angeles, CA, US $190k–$190k11d Lead architecture and development of wideband, high-performance data converters and associated analog front-ends for advanced mixed-signal SoCs.
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Memory Design Engineer BroadcomIND-Bangalore Electronic City - S1 11d Design and development of Single/Multiport SRAM and Register file compilers across 28nm to 5FF technologies.
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Principal Engineer - HIG HBM - ARCHITECTURE MicronRichardson, TX 11d Define and drive the architecture of high-speed analog and mixed-signal IO subsystems for next-generation High Bandwidth Memory (HBM) products used in AI and high-performance computing.
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Analog Electronics Design Engineer (m/f/d) - DELFT AmatNijmegen,NLD 11d Designing, modifying, and troubleshooting high-precision, low-noise analog and power circuit assemblies for electron beam-based wafer test systems.
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Principal Advanced Packaging Engineer AsteralabsTaiwan 11d Lead R&D for next-generation packaging technologies for optical chips (NPO and CPO products), setting technical direction and driving development of 2.1D, 2.5D, and 3D integration.
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Senior Hardware Engineer-Interconnection MicrosoftTaiwan, New Taipei City, New Taipei City 12d Develop detailed specifications and lead design reviews for high-speed interconnect solutions, ensuring co-design alignment across electrical, mechanical, and system disciplines for hyperscale and data center hardware.
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Principal Product Engineer – High-Speed IP SerDes CadenceGYEONGGI-DO (Seoul) 12d Principal Product Engineer leading post-sales technical support and product engineering for high-speed interface IP (SerDes), serving as the primary interface between customers and R&D.
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Principal Engineer - HIG HBM - ARCHITECTURE↗ Micron TechnologyRichardson, TX, US 12d Define and drive the architecture of high-speed analog and mixed-signal IO subsystems for next-generation High Bandwidth Memory (HBM) products used in AI and high-performance computing.
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Design Engineer SilabsOslo 12d Architect, design, and verify analog and digital circuits for low-power IoT MCUs and wireless transceivers.
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Principal SerDes Design Engineer↗ Celero CommunicationsRemote, US $200k–$200k12d Architecting and designing high-speed SerDes for next-generation transceivers to power AI systems.
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