CareerPlan

Advanced Packaging Design Engineering Team Lead (Hybrid)

San Jose, California, USFull-time$187k2026-10-29 → 2026-11-10
Hybrid

Core

Lead complex advanced IC package design programs for high-performance Silicon ASICs, driving planning, optimization, and execution from concept through tapeout.

Role type

Senior IC advanced packaging design team lead

Builds

High-speed, robust, and scalable Silicon ASICs for global networks (TOR switches to web-scale data centers)

Domain

Semiconductor / Advanced Packaging / Networking

Required skills

High-speed package design, Signal Integrity (SI), Power Distribution Networks (PDN), EDA tools for package layout, Technical leadership, Cross-functional collaboration

Preferred skills

ASIC package design, Silicon floor planning, Testing and measurement equipment (oscilloscopes, TDR/VNA), Scripting (Python, Perl, TCL, shell)

Technologies

EDA tools, Python, Perl, TCL, Shell

Responsibilities

Lead complex package design programs from concept to tapeout; Optimize package pinouts, stack-ups, power distribution, and high-speed routing; Collaborate with silicon floor planning, SI, and PI teams; Mentor engineers and develop future package leads; Enhance package design methodologies and partner with vendors; Coordinate resources across designers, layout editors, and contractors.

Seniority

Senior, hands-on IC with team leadership