CareerPlan

Serdes Silicon Design and Micro-Architecture Engineer

San Jose, CaliforniaFull-time2026-10-27 → 2026-11-10
Based in United StatesNo visa sponsorship

Core

Design and verify high-performance electrical and optical transceivers (Serdes) for next-gen processors and AI systems.

Role type

Senior IC analog/mixed-signal circuit design and transceiver micro-architecture engineer

Builds

High-speed electrical and optical transceivers in advanced CMOS PDKs

Domain

Semiconductor hardware design, analog/mixed-signal, high-speed interfaces

Required skills

analog/mixed-signal circuit design, transceiver micro-architecture, ultra-high-speed PHY design, modeling and simulation, verification, silicon validation

Preferred skills

link budgeting and modeling, architecture review, design spec documentation, firmware loop design

Technologies

CMOS PDKs, Tx/Rx analog front-end, clocking circuits, DSPs, CDR, adaptation and calibration loops

Responsibilities

Lead transceiver micro-architecture definition, modeling, simulation, implementation, and verification; Work with pre-tapeout verification and post-silicon validation teams to bring up silicon and analyze productization data

Seniority

Senior, hands-on IC