Analog IC Design
1,386 open positions
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Signal and Power Integrity Engineer Renesas-ElectronicsBengaluru, KA, in 23d Perform signal and power integrity analysis, simulation, and validation for high-speed package and board designs to ensure robust, manufacturable products.
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Memory Circuit Design Engineer↗ Intel CorporationAustin, TX, US $164k–$269k23d Design and development of advanced memory circuits (SRAMs, caches, register files, ROMs) for future CPU and SoC products to enable industry-leading power, performance, and area (PPA) on advanced CMOS processes.
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PIE Integration Engineer MicronHiroshima - Fab 15, Japan 23d Implement and integrate advanced engineering solutions to improve product performance in memory and storage systems.
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Hardware Engineer CiscoTaipei, Taiwan 23d Design advanced substrate and ASIC package layouts (BGA, flip-chip, SiP, multi-die) and HDI/mSAP PCBs for next-generation Cisco optical engines.
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Engineer II- Product↗ Microchip TechnologyBurnaby, BC, CA $76k–$76k23d Characterize, analyze, and debug high-speed SERDES architectures (up to 32Gbps NRZ/128Gbps PAM4) for datacenter, automotive, and space applications.
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Memory Circuit Design Engineer IntelUS, Texas, Austin $164k–$164k23d Design and development of advanced memory circuits (SRAMs, caches, register files, ROMs) for future CPU and SoC products to enable industry-leading power, performance, and area (PPA) on advanced CMOS processes.
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Lead Systems Signal Integrity/Power Integrity Engineer CerebrasSunnyvale, CA $220k–$220k23d Lead System Signal Integrity and Power Integrity Engineer solving complex integrity challenges in next-generation AI compute systems.
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Principal IC Analog / Mixed Signal Design Engineer AnalogdevicesUS, MA, Wilmington $157k–$157k23d Lead analog and mixed-signal circuit design for high-reliability power, connectivity, and analytics solutions in hyperscale data center platforms, specifically mixed-signal SoCs combining precision analog front-ends, high-speed data converters, and embedded…
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Senior PCB Design Engineer Arista-NetworksSanta Clara, CA, us $133k–$133k23d Design and develop ultra-high-speed networking platforms, including optical interface platforms up to 800G and 1.6T, for enterprise campuses, hyperscale datacenters, and AI clusters.
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Lead Engineer Analog ASIC Design (f/m/div.) Bosch-GroupRemote $88k–$88k24d Provide technical leadership for analog ASIC design sub-teams to develop next-generation power management solutions for the automotive industry.
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Analog IC Design Engineer Texas InstrumentsBengaluru, Karnataka, India 24d Designs and implements analog, analog-mixed signal & integrated circuits (ICs) enabling new TI products and customer solutions.
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Senior SERDES/C2C First-Silicon Bring-Up Engineer↗ SemidynamicsBarcelona, CT, ES 24d Senior IC engineer responsible for first-silicon bring-up of physical SERDES/C2C interfaces, isolating failures across PHY, clocking, calibration, and controller layers to transition from verification collateral to deterministic executable flows.
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R&D Engineering, Principal Engineer↗ SynopsysMississauga, ON, CA 24d Principal Engineer leading end-to-end Signal and Power Integrity (SIPI) for high-speed SerDes interfaces (PCIe Gen6/7/8, E224G, E448G, CXL) across silicon, package, board, and compliance fixtures.
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Senior Principal Analog Engineer -Power Management NxpHsinchu 24d Lead the definition, architecture, design, verification, and validation of complex analog and mixed-signal integrated circuits for hybrid converter and power delivery solutions in automotive and robotics applications.
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Mixed-signal Design Architect, HBM Architecture↗ Micron TechnologyRichardson, TX, US $146k–$146k24d Design, simulate, and optimize the architecture of 3D-stacked, high-performance mixed-signal memories for next-generation AI systems.
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SPOT Memory Engineer↗ Ambiq Micro Singapore Private Ltd.Outram, S00, SG 24d Design and validate ultra-low-power embedded SRAM and Register File IPs for advanced SoCs operating in near-threshold and sub-threshold voltage ranges.
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Analog Layout Lead LumilensSan Jose 24d Lead full-custom analog and mixed-signal layout for next-generation silicon platforms, ensuring performance, reliability, and tape-out readiness.
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?Analog Circuit Design Engineer (High Speed Serdes)↗ Geylang, S00, SG 24d Design and develop high-speed SerDes PHY circuits (PLL, CDR, CTLE) for advanced node semiconductor solutions.
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R&D Engineer IC Design BroadcomKorea-Seoul-HiBrand, KR 24d Design advanced RF power amplifiers for RF front-end modules, covering architecture, transistor-level circuit design, simulation, layout, and validation.
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Principal Hardware Engineer LumentumUSA - CA - San Jose (Ridder) $135k–$135k24d Subject-matter expert in hardware design, opto-electronic packaging, and materials science for high-performance optical transceivers.
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Experienced ASIC Analog Layout Engineer (m/f/d) AumovioRegensburg, BY, de 24d Top-level integration of analog and mixed-signal ICs, driving layout development for robust, DRC-compliant designs with optimal area utilization.
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IC Packaging Engineer↗ AppleCupertino, CA, US $150k–$150k25d Architect thermal solutions for mobile devices to address chip energy efficiency and performance scaling.
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Staff Analog IC Engineer SemtechIND - Hyderabad 25d Design and develop high-accuracy analog and mixed-signal ICs, taking ownership of critical chip subsystems.
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Lead Design Engineer CadenceBANGALORE 25d Design and verify high-speed, low-power SerDes transceivers for data-center, networking, AI, and high-performance computing applications.
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High Speed Digital and Photonics Applications Engineer↗ Keysight TechnologiesYishun, S00, SG 25d Strategic customer-facing engineer driving adoption of high-speed digital and optical solutions for AI datacenters, HPC, and silicon photonics.
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Logic Designer AlteraHaifa, Israel 25d Designing digital logic and DSP algorithms for mixed-signal IP blocks including high-speed SerDes, ADC/DAC digital, calibration engines, and control logic.
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Senior Mask Layout Design Engineer NVIDIATaiwan, Hsinchu 25d Performing physical layout for high-speed mixed-signal circuits (PLLs, SerDes, ADCs, ESD) in sub-micron CMOS technologies.
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Ingénieur Chercheur device CMOS avancé H/F↗ CeaRemote 25d Advanced CMOS transistor development from technological design to detailed electrical performance analysis.
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DSP Application Engineer, Staff↗ QualcommOttawa, ON, CA $109k–$109k26d Staff DSP Application Engineer supporting customer adoption and deployment of next-generation DSP solutions in Optical Transceivers and Active Electrical Cables (AEC) for AI and cloud infrastructure.
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Developer - Silicon Platform Validation, Python↗ HCLTechEdmonton, AB, CA 26d Architecting, designing, and delivering memory layout solutions for hardware and embedded systems projects.
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Optical Module Hardware FAE Intern MarvellCN - Wuhan 26d Support customer engagements and debug hardware/software systems for optical module products using PAM4 DSP, linear TIA, driver, and Coherent DSP technologies.
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