Senior Signal Integrity Engineer – Cryogenic Interconnects
Core
Develop accurate 3D EM models for PCB and interconnect structures and simulate multi-layer PCB designs under cryogenic conditions to define high-speed constraints and design guidelines.
Role type
Senior IC signal integrity engineer (cryogenic interconnects)
Builds
Next-generation cryogenic interconnect solutions for ultra-high-speed communication
Domain
Semiconductor hardware / High-speed digital interconnects / Cryogenic engineering
Deliverable
production ML models
Required skills
3D EM modeling and simulation, HFSS, multi-layer PCB design, high-frequency/broadband design, PCB materials knowledge, lab characterization (VNA), simulation-hardware correlation
Preferred skills
Low-loss/ultra-high-speed interconnects, materials modeling, extreme environment design
Technologies
HFSS, VNA, Network Analyzers
Responsibilities
Develop 3D EM models for PCB and interconnect structures, Simulate multi-layer PCB designs under cryogenic conditions, Define high-speed constraints and SI specifications, Perform lab characterization and validation, Correlate simulation results with hardware measurements, Collaborate with SI, materials, mixed-signal, and system teams
Seniority
Senior, hands-on IC
