Analog IC Design
2,189 open positions
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ASIC Analog Layout Engineer MicronMinneapolis, Minnesota, United States of America 18d Physical implementation of high-speed analog and mixed-signal circuits for ASICs used in Micron's tester and controller IP.
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Senior Mask Design Engineer – Hardware NVIDIAUS, CA, Santa Clara $136k–$259k18d Designing and developing detailed silicon interposer layouts for NVIDIA GPUs and SOCs, collaborating with package technical leads to resolve manufacturing and electrical design issues.
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Optical Design Engineer CiscoCarlsbad, California, US $138k–$198k18d Design and validate silicon photonics products (CPO, NPO, OCI, pluggable modules) from simulation to tapeout, integrating opto-electronic chipsets for Cisco's core networking hardware.
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Hardware Engineer - New Grad CienaOttawa, CA $75k–$120k18d Design and characterize mixed-signal analog IP blocks (DAC, ADC, SERDES, amplifiers) for high-speed optical fiber transmission solutions.
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Applications Engineering, Staff Engineer (Simulation) SynopsysSingapore 19d Staff Applications Engineer specializing in high-frequency simulation tools (Ansys HFSS, SIwave, Q3D) to support customer technical discovery, product demonstrations, and solution delivery for signal and power integrity.
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Sr Staff Packaging Product Engineer Renesas-ElectronicsSanta Rosa City, ph 19d Design, develop, and resolve issues on advanced packages for high performance power semiconductor products with high reliability, low cost, and mass production robustness.
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Senior Analog layout Engineer Advanced Micro Devices, IncHyderabad, India 19d Design high-performance analog and digital circuits (ADCs, DACs, PLLs, HBM, GDDR, DDR, LPDDR, References, Custom IOs, LDO, ESD) for advanced process nodes (7nm and below) integrated into AMD products.
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Staff Engineer Mixed Signal Layout (f/m/div.) InfineonVillach 19d Execute full-custom IC and block-level layout from schematic to tape-out for high-frequency RF blocks and high-speed SerDes components, ensuring signal and power integrity.
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Senior Design Engineer↗ Applied MaterialsSingapore, S00, SG 19d Lead complex thermal-mechanical simulation projects to influence package architecture, material selection, and reliability risk reduction for advanced semiconductor packages.
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Principal Software Engineer
AmazonTel Aviv-Yafo, Tel Aviv, Israel
19d
Technical authority for analog IP powering AWS's custom silicon portfolio, architecting high-performance analog blocks for products like Graviton, Nitro, and Trainium.
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Lead Layout Engineer QualcommBangalore, India 19d Develops block, macro, or chip level layouts and floorplans for Power Management (PMIC) modules, creating area and parasitic efficient designs that meet project specifications.
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Principal Engineer, Mixed-Signal Design Engineering AnalogdevicesEgypt, New Cairo 19d Lead architect for clock generation, distribution, and synchronization in advanced mixed-signal ICs for pin electronic testing and receive path development.
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Senior Analog Design Engineer - PMIC Production Support NxpToulouse, FR 19d Senior Analog Design Engineer supporting Power Management IC (PMIC) products in production, focusing on sustaining engineering, quality, cost improvements, and manufacturing support.
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E-core CPU Layout Design Engineer IntelMalaysia, Penang 19d Design the physical layout of Intel's E-Core (Atom) processors, focusing on analog blocks, digital designs, and memory compilers to ensure high-performance and energy-efficient solutions.
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Senior Engineering Manager MedtronicTempe, Arizona, United States of America 19d Lead a group of IC Designers focused on digital IC design, IC integration, verification, timing/power analysis, and design for test for next-generation Cardiac Rhythm Management (CRM) implantable devices.
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Senior Principal Engineer, Hardware Application Engineering — Signal Integrity & Power Integrity MarvellSanta Clara, CA, US 19d Senior technical authority ensuring Signal Integrity (SI) and Power Integrity (PI) for customer platforms built on Marvell's Ethernet Switch and UALink silicon, from prototype through mass production.
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Signal Integrity / Power Integrity Innovation Engineer↗ AioniosCupertino, CA, US $250k19d Develop tools and methodologies for electrical verification of IC, 3DIC, PCB, and complex electronic systems, focusing on signal integrity (SI) and power integrity (PI) analysis and debugging.
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High-Speed Analog IC Design Engineer (New graduate) MediaTekAustin, TX 19d Develop wireline transceivers for high-speed interconnect product lines, from architecture and circuit implementation through lab characterization and product refinement.
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Principal Signal Integrity Engineer HpeSunnyvale, California, United States of America $181k–$367k20d Perform high-speed ASIC PAM4 SerDes and system-level signal and power integrity analysis for cutting-edge networking product design.
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Principal Engineer - Analog Design (Team Lead)↗ Ambiq Micro Singapore Private Ltd.Outram, S00, SG 20d Lead technical roadmap and architecture for core analog subsystems (PMUs, clocking, data converters) while directly managing a team of analog designers.
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