PCIe Design Verification Intern - Summer 2027
Core
Verify PCIe and CXL hardware functionality and performance using SV/UVM test-benches.
Role type
Summer 2027 Design Verification Intern
Builds
Processor ISA, reference models, C simulation models, RTL models, HW emulators, and real hardware
Domain
Semiconductor hardware verification (PCIe/CXL)
Required skills
SystemVerilog, Python, Perl, Computer Architecture, ASIC design, Verification methodology
Preferred skills
Directed and random functional testing, Test plan writing, Build/test automation, Hardware simulation tools, Waveform debug tools
Responsibilities
Develop directed or random diagnostics to validate processor ISA, reference models, C simulation models, RTL models, HW emulators and real hardware; Write and review validation test plans; Debug diagnostics on various platforms; Collaborate with a worldwide team of engineers on planning, development, and deployment
