IP Verification Lead Engineer, Sr
Core
Lead engineer for IP level verification of hardware designs, developing testbenches and debugging using VCS.
Role type
Senior IC verification engineer (IP)
Builds
Verification environments and testbenches for digital IP blocks
Domain
Semiconductor hardware engineering
Required skills
System Verilog, UVM, VCS debugging, Digital design, Verilog, Functional/Code coverage, Bus protocols (AHB/AXI/APB)
Preferred skills
Security IP (cryptography, PRNG, RSA), SiFive RISC processor, Formal verification (VCF, Jasper Gold)
