CareerPlan

PCIe Design Verification Intern - Spring 2027

US, CA, Santa ClaraInternship2026-10-12 → 2026-11-10

Core

Verify PCIe and CXL hardware functionality and performance using SV/UVM test-benches.

Role type

Intern, hardware design verification

Builds

Processor ISA reference models, C simulation models, RTL models, HW emulators, and real hardware

Domain

Semiconductor hardware verification (PCIe/CXL)

Required skills

SystemVerilog, Python, Perl, computer architecture, ASIC design, verification methodology

Preferred skills

Directed and random functional testing, automation of build/test processes, hardware simulation tools, waveform debug tools

Responsibilities

Develop directed or random diagnostics to validate processor ISA and models; Write and review validation test plans; Debug diagnostics on various platforms; Collaborate with a worldwide team on planning, development, and deployment