ASIC Verification Engineering
1,075 open positions
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DV Intern EtchedSan Jose 7mo Design Verification intern ensuring custom IPs (systolic arrays, DMA engines, NoCs) are robust, high-performance, and silicon-ready for frontier intelligence chips.
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Staff DFT Design Engineer MonolithicpowerBarcelona, Spain 7mo Leads end-to-end design, implementation, verification, validation, and debugging of DFT architectures for Digital and Mixed-Signal ICs, specifically power management and signal management functions.
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Emulation Engineer AppleCupertino, United States of America 7mo Design and manufacture next-generation, high-performance, power-efficient processor and system-on-chip (SoC) for Apple devices.
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Lead Design Engineer CadencePUNE, IN 7mo Design and verification of microprocessor cores, multiprocessor sub-systems, and peripherals for Xtensa processors.
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Staff Design Verification Engineer ON SemiconductorBangalore, Karnataka, India 8mo Define verification plans, lead sub-teams, and develop SystemVerilog/UVM environments for blocks and top-level SoCs.
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Analog/Mixed-Signal Design Verification Engineer/Lead MediaTekHefei 8mo Lead Design Verification efforts for Analog/Mixed-Signal (AMS) IP using UVM-based environments, developing test benches, drivers, checkers, and assertions to achieve functional and code coverage goals.
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Senior ASIC Verification Engineer, Coherent High Speed Interconnect NVIDIATaiwan, Hsinchu 8mo Verify high-speed coherent interconnect designs, architecture, golden models, and micro-architecture for mobile SoCs and GPUs.
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Principal Verification Engineer - Video ArmMultiple locations 9mo Develop and maintain hardware verification environments for Image Signal Processors (ISPs), Display Processors, and Video codecs within Arm Compute Subsystems.
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IC Digital Design Engineer AumovioBengaluru, KA, in 9mo IC Digital Design Engineer responsible for IC verification, test architecture, and validation of analog/digital IPs for automotive systems.
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Design Verification Engineer – CPU Verification GlobalFoundriesIND - Karnataka - Bengaluru - North 9mo Functional verification of CPU cores, coherency, and cache subsystems using advanced verification methodologies.
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Principal Engineer, Design Verification AnalogdevicesUnited Kingdom, Edinburgh, SC, Freer 10mo Lead verification efforts for mixed-signal ICs in sensing, signal processing, power management, and audio domains, spanning concept through release.
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Senior RTL Design Engineer CiscoArmenia 10mo Senior RTL Design Engineer driving high-quality Design for Test (DFT) verification and digital design for Cisco Silicon One ASICs.
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Engineering Director - Verification IP Siemens-EdaFremont, CA, United States $180k–$180k10mo Lead the development of comprehensive verification IP solutions for next-generation interfaces and protocols including PCIe, USB, Ethernet, DDR, and CXL.
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Design Verification Engineer OpenAISan Francisco 11mo Verify functional correctness and robust design for custom AI-native silicon and system-level solutions powering frontier AI models.
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Design Verification Engineer Samsung Electronics 11mo Design Verification Engineer responsible for verifying Foundry IP and high-speed interface components for Samsung's System LSI, Memory, and Foundry solutions.
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